{"id":"https://openalex.org/W4285208820","doi":"https://doi.org/10.1109/tvlsi.2022.3170325","title":"A 0.0067-mm<sup>2</sup> 12-bit 20-MS/s SAR ADC Using Digital Place-and-Route Tools in 40-nm CMOS","display_name":"A 0.0067-mm<sup>2</sup> 12-bit 20-MS/s SAR ADC Using Digital Place-and-Route Tools in 40-nm CMOS","publication_year":2022,"publication_date":"2022-05-05","ids":{"openalex":"https://openalex.org/W4285208820","doi":"https://doi.org/10.1109/tvlsi.2022.3170325"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3170325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3170325","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015826285","display_name":"Yao-Hung Hubert Tsai","orcid":"https://orcid.org/0000-0001-5312-1875"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yao-Hung Tsai","raw_affiliation_strings":["Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064663968","display_name":"Shen-Iuan Liu","orcid":"https://orcid.org/0000-0002-3765-2948"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shen-Iuan Liu","raw_affiliation_strings":["Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5015826285"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":1.2008,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.75630002,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"30","issue":"7","first_page":"905","last_page":"914"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.854515790939331},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6585352420806885},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.5847570896148682},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48358720541000366},{"id":"https://openalex.org/keywords/12-bit","display_name":"12-bit","score":0.45875075459480286},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.4251968264579773},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41909295320510864},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.4169413149356842},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.40328365564346313},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3624073266983032},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32171428203582764},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2069123387336731},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1573016345500946},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11605772376060486}],"concepts":[{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.854515790939331},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6585352420806885},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.5847570896148682},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48358720541000366},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.45875075459480286},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.4251968264579773},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41909295320510864},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.4169413149356842},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.40328365564346313},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3624073266983032},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32171428203582764},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2069123387336731},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1573016345500946},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11605772376060486},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3170325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3170325","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"},{"id":"https://openalex.org/F4320323900","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1806144281","https://openalex.org/W1806621776","https://openalex.org/W2099432139","https://openalex.org/W2111186324","https://openalex.org/W2514013094","https://openalex.org/W2535745143","https://openalex.org/W2609793316","https://openalex.org/W2735106728","https://openalex.org/W2782303535","https://openalex.org/W2795591835","https://openalex.org/W2801584051","https://openalex.org/W2883878442","https://openalex.org/W2891288687","https://openalex.org/W2901134537","https://openalex.org/W2921806275","https://openalex.org/W2943848730","https://openalex.org/W2966288963","https://openalex.org/W2975781870","https://openalex.org/W2980833659","https://openalex.org/W3121152720","https://openalex.org/W3161548479","https://openalex.org/W3167271488","https://openalex.org/W3168451547","https://openalex.org/W3173998591","https://openalex.org/W3198544746","https://openalex.org/W3205219848","https://openalex.org/W3205709395","https://openalex.org/W3209003531","https://openalex.org/W4210583889"],"related_works":["https://openalex.org/W2278942241","https://openalex.org/W1977749038","https://openalex.org/W2082979872","https://openalex.org/W1641489184","https://openalex.org/W3004044036","https://openalex.org/W2792167570","https://openalex.org/W2290076986","https://openalex.org/W4206173322","https://openalex.org/W4312326809","https://openalex.org/W2368405386"],"abstract_inverted_index":{"A":[0],"12-bit":[1],"20-MS/s":[2],"asynchronous":[3],"successive":[4],"approximation":[5],"register":[6],"(SAR)":[7],"analog-to-digital":[8],"converter":[9],"(ADC)":[10],"is":[11,63,98,108,141,158],"presented":[12,73],"by":[13,65,91,128],"using":[14,49,66],"the":[15,23,27,31,41,50,53,57,67,76,79,83,87,92,118,121,135,154],"digital":[16],"place-and-route":[17],"(DPR)":[18],"tools.":[19,69,94],"The":[20,36],"macrocells":[21,51],"for":[22,40],"capacitive":[24],"digital-to-analog":[25],"converter,":[26],"bootstrapped":[28],"switch,":[29],"and":[30,52,86,104,153],"dynamic":[32,42],"comparator":[33],"are":[34,45,72],"presented.":[35,47],"custom":[37,54],"standard":[38,55],"cells":[39],"SAR":[43,61,96],"logic":[44],"also":[46],"By":[48],"ones,":[56],"layout":[58],"of":[59,82,131],"this":[60],"ADC":[62,97],"completed":[64],"DPR":[68,93,123],"Several":[70],"techniques":[71],"to":[74,133],"improve":[75],"parasitic":[77],"capacitances,":[78],"current":[80],"density":[81],"metal":[84],"interconnections,":[85],"nonideal":[88],"effects":[89],"caused":[90],"This":[95],"fabricated":[99],"in":[100],"40-nm":[101],"CMOS":[102],"technology":[103],"its":[105],"active":[106],"area":[107],"0.0067":[109],"mm":[110],"<sup":[111],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[112,144],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[113],".":[114],"To":[115],"compare":[116],"with":[117],"full-custom":[119],"method,":[120],"proposed":[122],"flow":[124],"has":[125],"speeded":[126],"up":[127],"a":[129],"factor":[130],"288":[132],"complete":[134],"interconnection":[136],"wires.":[137],"Its":[138],"power":[139],"dissipation":[140],"363":[142],"<inline-formula":[143],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[145],"<tex-math":[146],"notation=\"LaTeX\">$\\mu":[147],"\\text{W}$":[148],"</tex-math></inline-formula>":[149],"at":[150,162],"20":[151],"MS/s":[152],"calculated":[155],"Walden":[156],"FoM":[157],"23":[159],"fJ/c.":[160],"step":[161],"Nyquist":[163],"frequency.":[164]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
