{"id":"https://openalex.org/W4213187929","doi":"https://doi.org/10.1109/tvlsi.2022.3147743","title":"RPkNN: An OpenCL-Based FPGA Implementation of the Dimensionality-Reduced kNN Algorithm Using Random Projection","display_name":"RPkNN: An OpenCL-Based FPGA Implementation of the Dimensionality-Reduced kNN Algorithm Using Random Projection","publication_year":2022,"publication_date":"2022-02-15","ids":{"openalex":"https://openalex.org/W4213187929","doi":"https://doi.org/10.1109/tvlsi.2022.3147743"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3147743","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3147743","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078467314","display_name":"Erfan Bank Tavakoli","orcid":"https://orcid.org/0000-0002-3248-9301"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Erfan Bank Tavakoli","raw_affiliation_strings":["School of Computing and Augmented Intelligence, Arizona State University, Tempe, AZ, USA"],"raw_orcid":"https://orcid.org/0000-0002-3248-9301","affiliations":[{"raw_affiliation_string":"School of Computing and Augmented Intelligence, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046127616","display_name":"Amir Beygi","orcid":null},"institutions":[{"id":"https://openalex.org/I100625452","display_name":"ON Semiconductor (United States)","ror":"https://ror.org/03nw6pt28","country_code":"US","type":"company","lineage":["https://openalex.org/I100625452"]},{"id":"https://openalex.org/I4210101778","display_name":"Samsung (United States)","ror":"https://ror.org/01bfbvm65","country_code":"US","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210101778"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amir Beygi","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc, San Jose, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc, San Jose, CA, USA","institution_ids":["https://openalex.org/I100625452","https://openalex.org/I4210101778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089599626","display_name":"Xuebin Yao","orcid":null},"institutions":[{"id":"https://openalex.org/I100625452","display_name":"ON Semiconductor (United States)","ror":"https://ror.org/03nw6pt28","country_code":"US","type":"company","lineage":["https://openalex.org/I100625452"]},{"id":"https://openalex.org/I4210101778","display_name":"Samsung (United States)","ror":"https://ror.org/01bfbvm65","country_code":"US","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210101778"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xuebin Yao","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc, San Jose, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc, San Jose, CA, USA","institution_ids":["https://openalex.org/I100625452","https://openalex.org/I4210101778"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5078467314"],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":1.1225,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.78086521,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"30","issue":"4","first_page":"549","last_page":"552"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8213256001472473},{"id":"https://openalex.org/keywords/random-projection","display_name":"Random projection","score":0.8071632385253906},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7211118936538696},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5627268552780151},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.5618569850921631},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5274401307106018},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5004372596740723},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.48846951127052307},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31325381994247437},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08647862076759338}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8213256001472473},{"id":"https://openalex.org/C2777036070","wikidata":"https://www.wikidata.org/wiki/Q18393452","display_name":"Random projection","level":2,"score":0.8071632385253906},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7211118936538696},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5627268552780151},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.5618569850921631},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5274401307106018},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5004372596740723},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.48846951127052307},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31325381994247437},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08647862076759338}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3147743","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3147743","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W593092793","https://openalex.org/W1516726196","https://openalex.org/W1915513928","https://openalex.org/W2019182222","https://openalex.org/W2041836310","https://openalex.org/W2101234009","https://openalex.org/W2136132422","https://openalex.org/W2142827986","https://openalex.org/W2615623797","https://openalex.org/W2799244653","https://openalex.org/W2979473749","https://openalex.org/W3006389481","https://openalex.org/W3162360055","https://openalex.org/W3163113275","https://openalex.org/W6675354045"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2027972911","https://openalex.org/W2146343568","https://openalex.org/W2013643406","https://openalex.org/W2157978810","https://openalex.org/W2597809628","https://openalex.org/W2995430006"],"abstract_inverted_index":{"Due":[0],"to":[1,36,107,137,155,191],"the":[2,10,27,48,58,81,92,96,111,130,134,158,174,180,192,200,205,209,225,258,276],"so-called":[3],"curse":[4],"of":[5,12,91,129,133,145,208],"dimensionality":[6,61],"and":[7,22,80,84,110,126,142,170,172,176,239,260],"increase":[8],"in":[9,33,95],"size":[11],"databases,":[13,262],"there":[14],"is":[15,266],"an":[16,43,214],"ever-increasing":[17],"demand":[18],"for":[19,46,257],"computing":[20],"resources":[21],"memory":[23,124,163,185],"bandwidth":[24],"when":[25],"performing":[26],"k-nearest":[28],"neighbors":[29],"(kNNs)":[30],"algorithm,":[31],"resulting":[32],"a":[34,72,85,102,122,139,150,253],"slow-down":[35],"process":[37],"large":[38],"datasets.":[39],"This":[40],"work":[41],"presents":[42],"OpenCL-based":[44],"framework":[45,66],"accelerating":[47],"kNN":[49,82,112,119,206,255],"algorithm":[50,83],"on":[51,77,161,179,199,213,230],"field-programmable":[52],"gate":[53],"arrays":[54],"(FPGAs)":[55],"benefiting":[56],"from":[57],"random":[59,78,108,146,183],"projection":[60,79,109],"reduction.":[62],"The":[63,114,220],"proposed":[64,115,226],"RPkNN":[65,99,197,227,265],"includes":[67],"two":[68],"compute":[69,93],"modules":[70,94],"implementing":[71],"throughput-optimized":[73],"hardware":[74],"architecture":[75,116],"based":[76],"host":[86,193],"program":[87],"facilitating":[88],"easy":[89],"integration":[90],"existing":[97],"applications.":[98],"also":[100],"utilizes":[101],"new":[103],"buffering":[104],"scheme":[105],"tailored":[106],"algorithm.":[113],"enables":[117],"parallel":[118,143],"computations":[120],"with":[121,204],"single":[123,254],"channel":[125],"takes":[127],"advantage":[128],"sparsity":[131],"features":[132],"input":[135],"data":[136,160,178,189],"implement":[138],"highly":[140],"optimized":[141],"implementation":[144,207],"projection.":[147],"We":[148,195],"employ":[149],"computation":[151,256],"storage":[152],"device":[153],"(CSD)":[154],"directly":[156],"access":[157,184],"high-dimensional":[159],"non-volatile":[162],"express":[164],"(NVMe)":[165],"solid":[166],"state":[167],"drive":[168],"(SSD)":[169],"store":[171],"reuse":[173],"compressed":[175],"low-dimensional":[177],"FPGA":[181],"dynamic":[182],"(DRAM),":[186],"hence":[187],"eliminating":[188],"transfers":[190],"DRAM.":[194],"compare":[196],"implemented":[198],"Samsung":[201],"SmartSSD":[202],"CSD":[203],"scikit-learn":[210],"library":[211],"running":[212],"Intel":[215],"Xeon":[216],"Gold":[217],"6154":[218],"CPU.":[219],"experimental":[221],"results":[222],"show":[223],"that":[224],"solution":[228],"achieves,":[229],"average,":[231],"<inline-formula":[232,240,267],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[233,241,268],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[234,242,269],"<tex-math":[235,243,270],"notation=\"LaTeX\">$26\\times":[236],"$":[237,245,272],"</tex-math></inline-formula>":[238,246,273],"notation=\"LaTeX\">$46\\times":[244],"higher":[247],"performance":[248],"across":[249],"different":[250],"dimensions":[251],"per":[252],"SIFT1M":[259],"GIST1M":[261],"respectively.":[263],"Finally,":[264],"notation=\"LaTeX\">$1.7\\times":[271],"faster":[274],"than":[275],"similar":[277],"FPGA-based":[278],"reference":[279],"method.":[280]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}