{"id":"https://openalex.org/W4205685271","doi":"https://doi.org/10.1109/tvlsi.2021.3138538","title":"A 12-bit, 1.1-GS/s, Low-Power Flash ADC","display_name":"A 12-bit, 1.1-GS/s, Low-Power Flash ADC","publication_year":2022,"publication_date":"2022-01-07","ids":{"openalex":"https://openalex.org/W4205685271","doi":"https://doi.org/10.1109/tvlsi.2021.3138538"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2021.3138538","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3138538","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102922227","display_name":"Mahesh Kumar Adimulam","orcid":"https://orcid.org/0000-0003-0482-793X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mahesh Kumar Adimulam","raw_affiliation_strings":["Analog Design Group, Synopsys, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0002-9705-1538","affiliations":[{"raw_affiliation_string":"Analog Design Group, Synopsys, Hyderabad, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079825929","display_name":"M. B. Srinivas","orcid":"https://orcid.org/0000-0003-1555-3639"},"institutions":[{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. B. Srinivas","raw_affiliation_strings":["Department of Electrical and Electronics Engineering (EEE), Birla Institute of Technology and Science, Pilani, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0003-1555-3639","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering (EEE), Birla Institute of Technology and Science, Pilani, Hyderabad, India","institution_ids":["https://openalex.org/I74796645"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1109,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.73188242,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"30","issue":"3","first_page":"277","last_page":"290"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.8156449794769287},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.790961742401123},{"id":"https://openalex.org/keywords/flash-adc","display_name":"Flash ADC","score":0.7324238419532776},{"id":"https://openalex.org/keywords/least-significant-bit","display_name":"Least significant bit","score":0.645576536655426},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.6291308403015137},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.5837603211402893},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.5583728551864624},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5118011832237244},{"id":"https://openalex.org/keywords/nyquist-frequency","display_name":"Nyquist frequency","score":0.5009493827819824},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.4922579824924469},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4594299793243408},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.4306773841381073},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3712964653968811},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.353864848613739},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3419995903968811},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2715868055820465},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21473094820976257},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15419158339500427},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.1454148292541504},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.13093307614326477}],"concepts":[{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.8156449794769287},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.790961742401123},{"id":"https://openalex.org/C164862427","wikidata":"https://www.wikidata.org/wiki/Q2744647","display_name":"Flash ADC","level":4,"score":0.7324238419532776},{"id":"https://openalex.org/C4305246","wikidata":"https://www.wikidata.org/wiki/Q3885225","display_name":"Least significant bit","level":2,"score":0.645576536655426},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.6291308403015137},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.5837603211402893},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.5583728551864624},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5118011832237244},{"id":"https://openalex.org/C98273374","wikidata":"https://www.wikidata.org/wiki/Q1501757","display_name":"Nyquist frequency","level":3,"score":0.5009493827819824},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.4922579824924469},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4594299793243408},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.4306773841381073},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3712964653968811},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.353864848613739},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3419995903968811},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2715868055820465},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21473094820976257},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15419158339500427},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.1454148292541504},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.13093307614326477},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2021.3138538","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3138538","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8600000143051147,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W51782630","https://openalex.org/W1533614470","https://openalex.org/W1566916904","https://openalex.org/W1602282536","https://openalex.org/W1615941610","https://openalex.org/W1964616320","https://openalex.org/W1979509961","https://openalex.org/W1990446740","https://openalex.org/W2004097793","https://openalex.org/W2044250819","https://openalex.org/W2045599070","https://openalex.org/W2051815472","https://openalex.org/W2060747413","https://openalex.org/W2079575076","https://openalex.org/W2098175786","https://openalex.org/W2105111120","https://openalex.org/W2113537658","https://openalex.org/W2118414553","https://openalex.org/W2125944154","https://openalex.org/W2130417138","https://openalex.org/W2135177159","https://openalex.org/W2137774000","https://openalex.org/W2138923007","https://openalex.org/W2159348662","https://openalex.org/W2163359472","https://openalex.org/W2337374305","https://openalex.org/W2525427263","https://openalex.org/W2577762902","https://openalex.org/W2578010358","https://openalex.org/W2587931883","https://openalex.org/W2588036164","https://openalex.org/W2772200284","https://openalex.org/W2799388477","https://openalex.org/W2803495310","https://openalex.org/W2895383535","https://openalex.org/W2920991553","https://openalex.org/W2921837375","https://openalex.org/W2922317970","https://openalex.org/W3000563021","https://openalex.org/W4231501498"],"related_works":["https://openalex.org/W2999437256","https://openalex.org/W4295684761","https://openalex.org/W2035972461","https://openalex.org/W2736714494","https://openalex.org/W2381982958","https://openalex.org/W2207354743","https://openalex.org/W2999644509","https://openalex.org/W4205685271","https://openalex.org/W2084476353","https://openalex.org/W2033928918"],"abstract_inverted_index":{"In":[0],"this":[1],"article,":[2],"an":[3,106,133,158,187],"efficient":[4],"architecture":[5,30],"for":[6],"a":[7,23,32,74,79,85,126,140,149,200],"low-power,":[8],"high-resolution":[9],"flash":[10,69],"analog-to-digital":[11],"converter":[12],"(flash":[13],"ADC)":[14],"is":[15,31,95,170],"presented.":[16],"It":[17],"operates":[18],"at":[19,176,193],"12-bit":[20,93],"resolution":[21,94],"with":[22],"sampling":[24,178],"frequency":[25,179,197],"of":[26,36,67,130,137,146,154,161,164,189,203],"1.1":[27],"GS/s.":[28],"The":[29,88,108,121,184],"segmented":[33],"one":[34],"consisting":[35],"three":[37],"subflash":[38,100],"ADCs":[39],"that":[40],"we":[41],"call":[42],"SADC1,":[43],"SADC2,":[44],"and":[45,55,82,105,142,157,180,198],"SADC3.":[46],"During":[47],"the":[48,52,58,64,68,99,194],"operation,":[49],"SADC1":[50,72],"detects":[51,57,63],"MSB":[53],"bit,":[54],"SADC2":[56,77],"intermediate":[59],"bits,":[60],"while":[61],"SADC3":[62,83],"finer":[65],"bits":[66,162],"ADC.":[70],"Furthermore,":[71],"has":[73,78,84,110],"1-bit":[75],"resolution,":[76,81],"6-bit":[80],"5-bit":[86],"resolution.":[87],"binary":[89],"operation":[90],"related":[91],"to":[92,172],"achieved":[96],"by":[97],"combining":[98],"ADCs,":[101],"thermometer":[102],"digital":[103],"outputs,":[104],"encoder.":[107],"ADC":[109,185],"been":[111],"fabricated":[112],"in":[113],"Global":[114],"Foundry":[115],"(GF)":[116],"65-nm":[117],"standard":[118],"CMOS":[119],"process.":[120],"measured":[122],"performance":[123],"parameters":[124],"show":[125],"differential":[127],"nonlinearity":[128,135],"(DNL)":[129],"&#x00B1;0.24":[131],"LSB,":[132,139],"integral":[134],"(INL)":[136],"&#x00B1;0.45":[138],"signal-to-noise":[141],"distortion":[143],"ratio":[144],"(SNDR)":[145],"64.55":[147],"dB,":[148,156],"spurious-free":[150],"dynamic":[151],"range":[152],"(SFDR)":[153],"73.9":[155],"effective":[159],"number":[160],"(ENOB)":[163],"10.43":[165],"bits.":[166],"Also,":[167],"power":[168],"consumption":[169],"found":[171],"be":[173],"15.10":[174],"mW":[175],"1.1-GS/s":[177],"1.2-V":[181],"supply":[182],"voltage.":[183],"achieves":[186],"FOM":[188],"9.95":[190],"fJ/conversion-step":[191],"(c-s)":[192],"Nyquist":[195],"input":[196],"occupies":[199],"core":[201],"area":[202],"0.084":[204],"mm<sup>2</sup>.":[205]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}