{"id":"https://openalex.org/W3205108079","doi":"https://doi.org/10.1109/tvlsi.2021.3115970","title":"A 40-nm CMOS Multifunctional Computing-in-Memory (CIM) Using Single-Ended Disturb-Free 7T 1-Kb SRAM","display_name":"A 40-nm CMOS Multifunctional Computing-in-Memory (CIM) Using Single-Ended Disturb-Free 7T 1-Kb SRAM","publication_year":2021,"publication_date":"2021-10-14","ids":{"openalex":"https://openalex.org/W3205108079","doi":"https://doi.org/10.1109/tvlsi.2021.3115970","mag":"3205108079"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2021.3115970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3115970","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077220045","display_name":"Chua\u2010Chin Wang","orcid":"https://orcid.org/0000-0002-2426-2879"},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chua-Chin Wang","raw_affiliation_strings":["Department of Electrical Engineering, Institute of Undersea Technology (IUT), National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-2426-2879","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Institute of Undersea Technology (IUT), National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034165632","display_name":"Lean Karlo S. Tolentino","orcid":"https://orcid.org/0000-0002-8014-8229"},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Lean Karlo S. Tolentino","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-8014-8229","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018794895","display_name":"Chia\u2010Yi Huang","orcid":"https://orcid.org/0000-0002-9608-2789"},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Yi Huang","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012962861","display_name":"Chia\u2010Hung Yeh","orcid":"https://orcid.org/0000-0002-2837-6662"},"institutions":[{"id":"https://openalex.org/I134161618","display_name":"National Taiwan Normal University","ror":"https://ror.org/059dkdx38","country_code":"TW","type":"education","lineage":["https://openalex.org/I134161618"]},{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Hung Yeh","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan","Department of Electrical Engineering, National Taiwan Normal University, Taipei, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-2837-6662","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University (NSYSU), Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan Normal University, Taipei, Taiwan","institution_ids":["https://openalex.org/I134161618"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8038,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.69441955,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"29","issue":"12","first_page":"2172","last_page":"2185"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7376984357833862},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6250523924827576},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5975133776664734},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5759372115135193},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5721546411514282},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.5577563643455505},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5148276686668396},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.47284916043281555},{"id":"https://openalex.org/keywords/arithmetic-logic-unit","display_name":"Arithmetic logic unit","score":0.465175598859787},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.438785195350647},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.42808210849761963},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3936440348625183},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.27923348546028137},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22392284870147705},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20007801055908203},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19963356852531433},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1834728717803955}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7376984357833862},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6250523924827576},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5975133776664734},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5759372115135193},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5721546411514282},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.5577563643455505},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5148276686668396},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.47284916043281555},{"id":"https://openalex.org/C100276221","wikidata":"https://www.wikidata.org/wiki/Q192903","display_name":"Arithmetic logic unit","level":2,"score":0.465175598859787},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.438785195350647},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42808210849761963},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3936440348625183},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.27923348546028137},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22392284870147705},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20007801055908203},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19963356852531433},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1834728717803955},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2021.3115970","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3115970","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5899999737739563}],"awards":[{"id":"https://openalex.org/G3492891064","display_name":"Key Technology Development for Autonomous Underwater Vehicle with Artificial Intelligence( I )","funder_award_id":"MOST109-2218-E110-007","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G4233664290","display_name":"Key Technology Development for Autonomous Underwater Vehicle with Artificial Intelligence( II )","funder_award_id":"MOST108-2218-E110-002","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1972121063","https://openalex.org/W2033677635","https://openalex.org/W2058548075","https://openalex.org/W2066269170","https://openalex.org/W2127696501","https://openalex.org/W2133614817","https://openalex.org/W2144289736","https://openalex.org/W2149231820","https://openalex.org/W2172307690","https://openalex.org/W2175352867","https://openalex.org/W2563803926","https://openalex.org/W2585951290","https://openalex.org/W2589696891","https://openalex.org/W2591049986","https://openalex.org/W2593172471","https://openalex.org/W2771238178","https://openalex.org/W2775637085","https://openalex.org/W2777372517","https://openalex.org/W2790817284","https://openalex.org/W2897083155","https://openalex.org/W2905789341","https://openalex.org/W2968363684","https://openalex.org/W2994725618","https://openalex.org/W3017014515","https://openalex.org/W3017450162","https://openalex.org/W3104353813","https://openalex.org/W3121712272","https://openalex.org/W6665114239","https://openalex.org/W6767028650","https://openalex.org/W6776393429"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W2164807290","https://openalex.org/W4253916831","https://openalex.org/W3104911090","https://openalex.org/W4211022581","https://openalex.org/W2622606198"],"abstract_inverted_index":{"This":[0],"investigation":[1],"proposes":[2],"a":[3],"computing-in-memory":[4],"(CIM)":[5],"design":[6],"to":[7,62,135],"circumvent":[8],"the":[9,52,72,80,103,144,150,158,161,165],"von":[10],"Neumann":[11],"bottleneck":[12],"which":[13],"causes":[14],"limited":[15],"computation":[16],"throughput":[17],"for":[18,51,65],"effective":[19],"artificial":[20],"intelligence":[21],"(AI)":[22],"applications.":[23],"The":[24,139],"proposed":[25,162],"CIM":[26,140,163],"performs":[27,164],"multiple":[28,42],"operations":[29,133,169],"such":[30,44],"as":[31,45],"single-instruction":[32],"basic":[33],"Boolean":[34],"operations,":[35],"addition,":[36],"and":[37,41,48,79,89,119,131,170],"signed":[38],"number":[39,167],"multiplication,":[40],"functions":[43],"normal":[46],"mode":[47,50],"retention":[49],"built-in":[53],"self-test":[54],"(BIST).":[55],"Its":[56,85,124],"2T-Switch":[57],"requires":[58],"only":[59],"two":[60],"transistors":[61],"be":[63,76],"utilized":[64],"static":[66],"random-access":[67],"memory":[68,137],"(SRAM)":[69],"array;":[70],"thus,":[71],"arithmetic":[73],"unit":[74,92],"can":[75],"chosen":[77],"easily":[78],"area":[81,122,152],"overhead":[82],"is":[83,141],"minimized.":[84],"ripple":[86],"carry":[87],"adder":[88],"multiplier":[90],"(RCAM)":[91],"based":[93],"on":[94],"single-ended":[95],"disturb-free":[96],"7T":[97],"1-Kb":[98],"SRAM":[99],"was":[100],"developed":[101],"using":[102,143],"full":[104,112],"swing-gate":[105],"diffusion":[106],"input":[107],"(FS-GDI)":[108],"technology":[109],"that":[110],"has":[111],"voltage":[113],"swing":[114],"resolution,":[115],"low":[116],"power":[117],"consumption,":[118],"less":[120],"chip":[121],"cost.":[123],"Auto-Switching":[125],"Write":[126],"Back":[127],"Circuit":[128],"restores":[129],"addition":[130],"multiplication":[132],"automatically":[134],"assigned":[136],"address.":[138],"implemented":[142],"TSMC":[145],"40-nm":[146],"CMOS":[147],"process,":[148],"where":[149],"core":[151],"is$432.81":[153],"\\times":[154],"510.265\\,\\,\\mu":[155],"\\text{m}^{2}$.":[156],"Among":[157],"related":[159],"works,":[160],"most":[166],"of":[168],"functions.":[171]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}