{"id":"https://openalex.org/W3204374647","doi":"https://doi.org/10.1109/tvlsi.2021.3115037","title":"Multiphase Digital Low-Dropout Regulators","display_name":"Multiphase Digital Low-Dropout Regulators","publication_year":2021,"publication_date":"2021-10-06","ids":{"openalex":"https://openalex.org/W3204374647","doi":"https://doi.org/10.1109/tvlsi.2021.3115037","mag":"3204374647"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2021.3115037","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3115037","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036685018","display_name":"Ragh Kuttappa","orcid":"https://orcid.org/0000-0003-1022-2187"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ragh Kuttappa","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100447552","display_name":"Longfei Wang","orcid":"https://orcid.org/0000-0002-1836-3614"},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Longfei Wang","raw_affiliation_strings":["Qualcomm Technologies Inc., San Diego, CA, USA"],"affiliations":[{"raw_affiliation_string":"Qualcomm Technologies Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080439104","display_name":"Sel\u00e7uk K\u00f6se","orcid":"https://orcid.org/0000-0001-8095-6691"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Selcuk Kose","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081080799","display_name":"Bar\u0131\u015f Ta\u015fk\u0131n","orcid":"https://orcid.org/0000-0002-7631-5696"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Baris Taskin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036685018"],"corresponding_institution_ids":["https://openalex.org/I72816309"],"apc_list":null,"apc_paid":null,"fwci":0.0836,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.38730537,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"30","issue":"1","first_page":"40","last_page":"50"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ripple","display_name":"Ripple","score":0.7657170295715332},{"id":"https://openalex.org/keywords/transient-response","display_name":"Transient response","score":0.5607762932777405},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5342485308647156},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.5251535773277283},{"id":"https://openalex.org/keywords/digital-control","display_name":"Digital control","score":0.5246572494506836},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5159803032875061},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5045684576034546},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.4807003140449524},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45269232988357544},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.4366401135921478},{"id":"https://openalex.org/keywords/voltage-droop","display_name":"Voltage droop","score":0.4365687966346741},{"id":"https://openalex.org/keywords/dynamic-voltage-scaling","display_name":"Dynamic voltage scaling","score":0.426969438791275},{"id":"https://openalex.org/keywords/voltage-regulator","display_name":"Voltage regulator","score":0.36681807041168213},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32184329628944397},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2925807237625122},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.28721439838409424}],"concepts":[{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.7657170295715332},{"id":"https://openalex.org/C85761212","wikidata":"https://www.wikidata.org/wiki/Q1974593","display_name":"Transient response","level":2,"score":0.5607762932777405},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5342485308647156},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.5251535773277283},{"id":"https://openalex.org/C158411068","wikidata":"https://www.wikidata.org/wiki/Q2720568","display_name":"Digital control","level":2,"score":0.5246572494506836},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5159803032875061},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5045684576034546},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.4807003140449524},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45269232988357544},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.4366401135921478},{"id":"https://openalex.org/C40760162","wikidata":"https://www.wikidata.org/wiki/Q10920295","display_name":"Voltage droop","level":4,"score":0.4365687966346741},{"id":"https://openalex.org/C2776047111","wikidata":"https://www.wikidata.org/wiki/Q632037","display_name":"Dynamic voltage scaling","level":3,"score":0.426969438791275},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.36681807041168213},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32184329628944397},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2925807237625122},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.28721439838409424},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2021.3115037","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3115037","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G6253688805","display_name":null,"funder_award_id":"2008629","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G8516122510","display_name":null,"funder_award_id":"1816857","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1593782789","https://openalex.org/W1992459337","https://openalex.org/W2016742793","https://openalex.org/W2031283182","https://openalex.org/W2039677366","https://openalex.org/W2066587372","https://openalex.org/W2078616351","https://openalex.org/W2079442988","https://openalex.org/W2088518257","https://openalex.org/W2098264218","https://openalex.org/W2103943364","https://openalex.org/W2122724421","https://openalex.org/W2134327452","https://openalex.org/W2138857663","https://openalex.org/W2144402314","https://openalex.org/W2158552598","https://openalex.org/W2163793609","https://openalex.org/W2296539640","https://openalex.org/W2319748949","https://openalex.org/W2343518286","https://openalex.org/W2609329766","https://openalex.org/W2758730738","https://openalex.org/W2768119460","https://openalex.org/W2864195285","https://openalex.org/W2918847811","https://openalex.org/W2946512309","https://openalex.org/W2954653321","https://openalex.org/W2965469962","https://openalex.org/W2971147782","https://openalex.org/W2971909604","https://openalex.org/W3155757514","https://openalex.org/W4240214568"],"related_works":["https://openalex.org/W2141242302","https://openalex.org/W2121504539","https://openalex.org/W2101688915","https://openalex.org/W2158971232","https://openalex.org/W3143913480","https://openalex.org/W2081840904","https://openalex.org/W2110432198","https://openalex.org/W2587244181","https://openalex.org/W3006241075","https://openalex.org/W2070385207"],"abstract_inverted_index":{"In":[0],"this":[1],"work,":[2],"multiphase":[3,86],"digital":[4,139],"low-dropout":[5],"(MP-DLDO)":[6],"regulators":[7],"are":[8,35,65,114,126],"designed":[9,39],"with":[10,40,51,67,141,197],"resonant":[11,76],"rotary":[12],"clocks":[13],"(ReRoCs)":[14],"in":[15,84,107,157],"order":[16],"to":[17,45,119,132,193],"improve":[18,91],"on":[19,128,137,166],"the":[20,63,81,85,92,108,117,134,146,158],"tradeoff":[21],"of":[22,174,186,201],"conventional":[23,195],"DLDOs":[24,34],"between":[25],"current":[26,48],"efficiency":[27],"and":[28,89,101,154,181],"transient":[29,52,93,150],"response":[30,53,94,151],"speed.":[31],"The":[32,59,111,161],"proposed":[33,112,162],"multiphased,":[36],"coined":[37],"MP-DLDOs,":[38],"a":[41,72,171,194,198],"clock-gated":[42],"control":[43,159],"technique":[44],"provide":[46],"high":[47],"efficiencies":[49],"along":[50],"improvements":[54],"at":[55],"GHz":[56],"frequency":[57,200],"levels.":[58],"multiple":[60],"phases":[61],"within":[62],"MP-DLDO":[64,135,163],"served":[66],"ReRoCs":[68],"that":[69,144],"provide:":[70],"1)":[71],"robust":[73],"high-speed":[74],"low-power":[75],"clock":[77],"distribution":[78],"solution":[79],"for":[80],"synchronous":[82],"elements":[83],"DLDO":[87],"architecture":[88,136],"2)":[90],"characteristics":[95],"[dynamic":[96],"voltage":[97,102,122,147,184],"scaling":[98],"(DVS)":[99],"speed":[100,152,173],"ripple]":[103],"while":[104],"saving":[105],"power":[106,155],"controller":[109],"circuitry.":[110],"MP-DLDOs":[113],"distributed":[115],"across":[116],"chip":[118],"achieve":[120],"low":[121],"ripple.":[123],"SPICE":[124],"simulations":[125],"performed":[127],"post-layout,":[129],"parasitic-extracted":[130],"models":[131],"evaluate":[133],"open-source":[138],"cores,":[140],"performance":[142],"metrics":[143],"include":[145],"ripple":[148,185],"reduction,":[149],"improvement,":[153],"savings":[156],"logic.":[160],"architecture,":[164],"evaluated":[165],"an":[167,182],"RISC-V":[168],"design,":[169],"demonstrates":[170],"DVS":[172],"6.5":[175],"V/<inline-formula>":[176],"<tex-math":[177],"notation=\"LaTeX\">$\\mu":[178],"\\text{s}$":[179],"</tex-math></inline-formula>":[180],"output":[183],"21.1":[187],"mV":[188],"(38&#x0025;":[189],"reduction":[190],"when":[191],"compared":[192],"DLDO)":[196],"sampling":[199],"2":[202],"GHz.":[203]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}