{"id":"https://openalex.org/W3135094670","doi":"https://doi.org/10.1109/tvlsi.2021.3061649","title":"Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities","display_name":"Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities","publication_year":2021,"publication_date":"2021-03-10","ids":{"openalex":"https://openalex.org/W3135094670","doi":"https://doi.org/10.1109/tvlsi.2021.3061649","mag":"3135094670"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2021.3061649","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3061649","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102778960","display_name":"Sriram Vangal","orcid":"https://orcid.org/0000-0003-1548-9876"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sriram Vangal","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0003-1548-9876","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100619719","display_name":"Somnath Paul","orcid":"https://orcid.org/0000-0001-9908-669X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Somnath Paul","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-9908-669X","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109340111","display_name":"Steven Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven Hsu","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-4220-3346","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102979641","display_name":"Saurabh Kumar","orcid":"https://orcid.org/0000-0002-5213-9739"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saurabh Kumar","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-5213-9739","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram Krishnamurthy","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-2428-7099","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043243464","display_name":"Harish K. Krishnamurthy","orcid":"https://orcid.org/0000-0001-5927-8339"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Harish Krishnamurthy","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-5927-8339","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067753561","display_name":"James Tschanz","orcid":"https://orcid.org/0000-0003-0317-4332"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Tschanz","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0003-0317-4332","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076642880","display_name":"Vivek De","orcid":"https://orcid.org/0000-0001-5207-1079"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vivek De","raw_affiliation_strings":["Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-5207-1079","affiliations":[{"raw_affiliation_string":"Circuit Research, Intel Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043025421","display_name":"Chris H. Kim","orcid":"https://orcid.org/0000-0002-4194-1347"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chris H. Kim","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-4194-1347","affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8136,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.7127148,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"29","issue":"5","first_page":"843","last_page":"856"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.710859477519989},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5800108313560486},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5733793377876282},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5270648002624512},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5159736275672913},{"id":"https://openalex.org/keywords/cloud-computing","display_name":"Cloud computing","score":0.45077797770500183},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43389198184013367},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4294029772281647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4216890335083008},{"id":"https://openalex.org/keywords/broadband","display_name":"Broadband","score":0.41713422536849976},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3828931450843811},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31555449962615967},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3090217113494873},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17378059029579163},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09130436182022095}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.710859477519989},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5800108313560486},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5733793377876282},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5270648002624512},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5159736275672913},{"id":"https://openalex.org/C79974875","wikidata":"https://www.wikidata.org/wiki/Q483639","display_name":"Cloud computing","level":2,"score":0.45077797770500183},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43389198184013367},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4294029772281647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4216890335083008},{"id":"https://openalex.org/C509933004","wikidata":"https://www.wikidata.org/wiki/Q194163","display_name":"Broadband","level":2,"score":0.41713422536849976},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3828931450843811},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31555449962615967},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3090217113494873},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17378059029579163},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09130436182022095}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2021.3061649","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3061649","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W1550639219","https://openalex.org/W1584496665","https://openalex.org/W1911029421","https://openalex.org/W1964057018","https://openalex.org/W1984711740","https://openalex.org/W1995932919","https://openalex.org/W1998525920","https://openalex.org/W2004984689","https://openalex.org/W2015674476","https://openalex.org/W2020875745","https://openalex.org/W2033443176","https://openalex.org/W2050248134","https://openalex.org/W2064266963","https://openalex.org/W2072607061","https://openalex.org/W2081186910","https://openalex.org/W2085503707","https://openalex.org/W2093056180","https://openalex.org/W2099278122","https://openalex.org/W2100065836","https://openalex.org/W2101360724","https://openalex.org/W2105302023","https://openalex.org/W2108126303","https://openalex.org/W2115611348","https://openalex.org/W2130780249","https://openalex.org/W2134327452","https://openalex.org/W2146410479","https://openalex.org/W2147521557","https://openalex.org/W2152186047","https://openalex.org/W2156638740","https://openalex.org/W2156667996","https://openalex.org/W2159747318","https://openalex.org/W2160642395","https://openalex.org/W2401935718","https://openalex.org/W2544676522","https://openalex.org/W2594869149","https://openalex.org/W2741066933","https://openalex.org/W2769167907","https://openalex.org/W2786121193","https://openalex.org/W4245956885","https://openalex.org/W4247741062","https://openalex.org/W6640006728","https://openalex.org/W6651605276","https://openalex.org/W6655872142","https://openalex.org/W6668441287","https://openalex.org/W6675438776","https://openalex.org/W6681641930","https://openalex.org/W6742453718","https://openalex.org/W6742468178"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2525430402","https://openalex.org/W2123002901","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740"],"abstract_inverted_index":{"The":[0],"system-on-chip":[1],"(SoC)":[2],"designs":[3],"for":[4,28,62,83,121,127,141],"future":[5,108,177],"Internet":[6],"of":[7,38,65,106],"Things":[8],"(IoT)":[9],"systems,":[10],"spanning":[11],"client":[12],"platforms":[13],"to":[14,18,158,170],"cloud":[15],"datacenters,":[16],"need":[17],"deliver":[19],"uncompromising":[20],"and":[21,31,46,53,68,73,81,112,143,147,155,175],"scalable":[22,54],"performance":[23,56],"with":[24],"extreme":[25],"energy":[26,39],"efficiency":[27],"diverse":[29],"workloads":[30,70],"applications,":[32],"while":[33],"satisfying":[34],"a":[35,63,93],"wide":[36,94],"range":[37,64,96],"budgets,":[40],"as":[41,43],"well":[42],"platform":[44],"cooling":[45],"power":[47],"delivery":[48],"constraints.":[49],"Low-latency,":[50],"burst-mode":[51],"responsiveness,":[52],"high-throughput":[55],"must":[57],"be":[58,168],"delivered":[59],"on":[60],"demand":[61],"thread-parallel,":[66],"task-parallel,":[67],"data-parallel":[69],"covering":[71],"traditional":[72],"emerging":[74],"applications.":[75],"This":[76,114],"article":[77,115],"discusses":[78],"the":[79,103,107,172],"challenges":[80],"opportunities":[82],"many-core":[84],"SoC":[85],"design":[86,119],"in":[87],"scaled":[88],"CMOS":[89],"process":[90],"operating":[91],"over":[92],"voltage-frequency":[95],"including":[97],"near-threshold-voltage":[98],"(NTV)":[99],"that":[100],"can":[101],"meet":[102],"compute":[104],"demands":[105],"at":[109,162],"scale,":[110],"flexibly,":[111],"efficiently.":[113],"covers:":[116],"1)":[117],"circuit":[118],"techniques":[120,126,157,174],"NTV":[122],"cores;":[123],"2)":[124],"mitigation":[125,156],"within-die":[128],"parameter":[129],"variations":[130],"via":[131],"multivoltage":[132],"frequency":[133],"schemes;":[134],"3)":[135],"digital":[136],"integrated":[137],"voltage":[138,145],"regulators":[139],"(VRs)":[140],"fine-grain":[142],"wide-range":[144],"modulation;":[146],"4)":[148],"radiation-induced":[149],"soft":[150],"error":[151],"rate":[152],"(SER)":[153],"characterization":[154],"enable":[159],"reliable":[160],"operation":[161],"NTV.":[163],"Silicon":[164],"prototype":[165],"examples":[166],"will":[167],"used":[169],"illustrate":[171],"different":[173],"highlight":[176],"research":[178],"directions.":[179]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
