{"id":"https://openalex.org/W3130411624","doi":"https://doi.org/10.1109/tvlsi.2021.3056506","title":"A Wide-Range Folded-Tuned Dual-DLL-Based Clock-Deskewing Circuit for Core-to-Core Links","display_name":"A Wide-Range Folded-Tuned Dual-DLL-Based Clock-Deskewing Circuit for Core-to-Core Links","publication_year":2021,"publication_date":"2021-02-13","ids":{"openalex":"https://openalex.org/W3130411624","doi":"https://doi.org/10.1109/tvlsi.2021.3056506","mag":"3130411624"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2021.3056506","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3056506","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066897196","display_name":"Ching\u2010Yuan Yang","orcid":"https://orcid.org/0000-0002-5335-3665"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Yuan Yang","raw_affiliation_strings":["Graduate Institute of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-5335-3665","affiliations":[{"raw_affiliation_string":"Graduate Institute of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]},{"raw_affiliation_string":"National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031864203","display_name":"Miao-Shan Li","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Miao-Shan Li","raw_affiliation_strings":["Graduate Institute of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085960300","display_name":"Ai-Jia Chuang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ai-Jia Chuang","raw_affiliation_strings":["ILI Technology Corporation, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ILI Technology Corporation, Hsinchu, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4019,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.54808894,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"29","issue":"5","first_page":"883","last_page":"894"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7695830464363098},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6110245585441589},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5596597790718079},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5118069052696228},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5039035677909851},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.46823850274086},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4507548213005066},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.4488261342048645},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3872795104980469},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.26264917850494385},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2541302740573883},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11245104670524597}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7695830464363098},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6110245585441589},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5596597790718079},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5118069052696228},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5039035677909851},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.46823850274086},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4507548213005066},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.4488261342048645},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3872795104980469},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.26264917850494385},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2541302740573883},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11245104670524597},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2021.3056506","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2021.3056506","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5600000023841858}],"awards":[{"id":"https://openalex.org/G1248062306","display_name":"Design of Fmcw Frequency Synthesis Circuits for D-Band Environment Detection System","funder_award_id":"MOST108-2221-E005-009","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1969421959","https://openalex.org/W1974775547","https://openalex.org/W1990497714","https://openalex.org/W2001078510","https://openalex.org/W2005421687","https://openalex.org/W2027411961","https://openalex.org/W2050407686","https://openalex.org/W2066210619","https://openalex.org/W2086336002","https://openalex.org/W2108034570","https://openalex.org/W2114953806","https://openalex.org/W2117599119","https://openalex.org/W2126227985","https://openalex.org/W2129393153","https://openalex.org/W2133294020","https://openalex.org/W2137378553","https://openalex.org/W2152073936","https://openalex.org/W2171158799","https://openalex.org/W2171569400","https://openalex.org/W2173972090","https://openalex.org/W2343144621","https://openalex.org/W2344622367","https://openalex.org/W2744889047","https://openalex.org/W2801623895","https://openalex.org/W2914744205","https://openalex.org/W3005396597","https://openalex.org/W4239733953","https://openalex.org/W6682417164","https://openalex.org/W6704423157","https://openalex.org/W6704632368"],"related_works":["https://openalex.org/W3107870742","https://openalex.org/W2146050991","https://openalex.org/W4309640350","https://openalex.org/W2016505373","https://openalex.org/W4312708667","https://openalex.org/W2218086155","https://openalex.org/W4295700774","https://openalex.org/W1885045956","https://openalex.org/W2101913248","https://openalex.org/W1491025498"],"abstract_inverted_index":{"Without":[0],"any":[1],"dummy":[2],"element":[3],"for":[4,24],"phase":[5],"compensation,":[6],"a":[7,12,55,78,128],"clock-deskewing":[8],"circuit":[9],"(CDC)":[10],"using":[11],"master-slave":[13],"delay-locked":[14],"loop":[15],"(MSDLL)":[16],"configuration":[17],"is":[18,63,81,115,124],"presented":[19],"to":[20,53,86,103],"synchronize":[21],"the":[22,45,66,84,89,97,107,120],"clocks":[23],"cascaded":[25],"core-to-core":[26],"links.":[27],"The":[28,42,59,111],"dual-locking":[29],"CDC":[30,98],"provides":[31],"mismatch-insensitive":[32],"compensation":[33],"of":[34,68,73,109],"interconnected":[35],"wires,":[36],"input/outputs":[37],"(IOs),":[38],"and":[39,70,119],"clock":[40,113],"buffers.":[41],"MSDLL":[43],"incorporates":[44],"digital-selection":[46],"folded":[47],"coarse-fine":[48],"voltage-controlled":[49],"delay":[50],"line":[51],"(FCF-VCDL)":[52],"provide":[54,100],"wide":[56],"range":[57],"operations.":[58],"proposed":[60],"FCF-VCDL":[61,85],"scheme":[62],"constructed":[64],"from":[65],"combination":[67],"positive":[69],"negative":[71],"gains":[72],"different":[74],"VCDLs.":[75],"In":[76],"addition,":[77],"power-controlled":[79],"regime":[80],"employed":[82],"in":[83],"adaptively":[87],"lower":[88],"power":[90,122],"dissipation.":[91],"Implemented":[92],"with":[93,106],"0.18-":[94],"\u03bcm":[95],"CMOS,":[96],"can":[99],"20":[101,125],"MHz":[102],"2":[104],"GHz":[105],"help":[108],"FCF-VCDLs.":[110],"2-GHz":[112],"jitter":[114],"6.78":[116],"ps":[117],"(pk-pk),":[118],"total":[121],"dissipation":[123],"mW":[126],"under":[127],"1.8-V":[129],"supply.":[130]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}