{"id":"https://openalex.org/W3080132014","doi":"https://doi.org/10.1109/tvlsi.2020.3015494","title":"Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse","display_name":"Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse","publication_year":2020,"publication_date":"2020-08-24","ids":{"openalex":"https://openalex.org/W3080132014","doi":"https://doi.org/10.1109/tvlsi.2020.3015494","mag":"3080132014"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2020.3015494","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2020.3015494","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100434618","display_name":"Jinwoo Kim","orcid":"https://orcid.org/0000-0003-4380-6656"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jinwoo Kim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086357798","display_name":"Gauthaman Murali","orcid":"https://orcid.org/0000-0003-0146-4977"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gauthaman Murali","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022173483","display_name":"Heechun Park","orcid":"https://orcid.org/0000-0003-2796-518X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Heechun Park","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064436855","display_name":"Eric Qin","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eric Qin","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074768327","display_name":"Hyoukjun Kwon","orcid":"https://orcid.org/0000-0001-9824-1352"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hyoukjun Kwon","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009406984","display_name":"Venkata Chaitanya Krishna Chekuri","orcid":"https://orcid.org/0000-0002-3175-3350"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Venkata Chaitanya Krishna Chekuri","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083457390","display_name":"Nael Mizanur Rahman","orcid":"https://orcid.org/0000-0002-3556-838X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nael Mizanur Rahman","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069048656","display_name":"Nihar Dasari","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nihar Dasari","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079752672","display_name":"Arvind Singh","orcid":"https://orcid.org/0000-0001-5238-7196"},"institutions":[{"id":"https://openalex.org/I4210095722","display_name":"Rambus (United States)","ror":"https://ror.org/00pn5a327","country_code":"US","type":"company","lineage":["https://openalex.org/I4210095722"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind Singh","raw_affiliation_strings":["Rambus Cryptography Research Division, Rambus Inc, San Francisco, CA, USA"],"affiliations":[{"raw_affiliation_string":"Rambus Cryptography Research Division, Rambus Inc, San Francisco, CA, USA","institution_ids":["https://openalex.org/I4210095722"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101557260","display_name":"Minah Lee","orcid":"https://orcid.org/0000-0002-3800-802X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Minah Lee","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065505938","display_name":"Hakki Mert Torun","orcid":"https://orcid.org/0000-0002-9611-1658"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hakki Mert Torun","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008272623","display_name":"Kallol Roy","orcid":"https://orcid.org/0000-0002-6557-2689"},"institutions":[{"id":"https://openalex.org/I56085075","display_name":"University of Tartu","ror":"https://ror.org/03z77qz90","country_code":"EE","type":"education","lineage":["https://openalex.org/I56085075"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Kallol Roy","raw_affiliation_strings":["Institute of Computer Science, University of Tartu, Tartu, Estonia"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Science, University of Tartu, Tartu, Estonia","institution_ids":["https://openalex.org/I56085075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085554167","display_name":"Madhavan Swaminathan","orcid":"https://orcid.org/0000-0003-1729-2807"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Madhavan Swaminathan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009591041","display_name":"Saibal Mukhopadhyay","orcid":"https://orcid.org/0000-0002-8894-3390"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saibal Mukhopadhyay","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034089074","display_name":"Tushar Krishna","orcid":"https://orcid.org/0000-0001-5738-6942"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tushar Krishna","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052950521","display_name":"Sung Kyu Lim","orcid":"https://orcid.org/0000-0002-2267-5282"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sung Kyu Lim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":16,"corresponding_author_ids":["https://openalex.org/A5100434618"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":3.3199,"has_fulltext":false,"cited_by_count":92,"citation_normalized_percentile":{"value":0.92882195,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"28","issue":"11","first_page":"2424","last_page":"2437"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9890000224113464,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6354767084121704},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5977392792701721},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5955143570899963},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.5403140187263489},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5058578848838806},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5052743554115295},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.4991300106048584},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.47461262345314026},{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.4674822688102722},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.43323737382888794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2114890217781067},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12970542907714844},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.10485127568244934},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08117887377738953}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6354767084121704},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5977392792701721},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5955143570899963},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.5403140187263489},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5058578848838806},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5052743554115295},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.4991300106048584},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.47461262345314026},{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.4674822688102722},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.43323737382888794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2114890217781067},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12970542907714844},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.10485127568244934},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08117887377738953},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2020.3015494","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2020.3015494","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.47999998927116394}],"awards":[{"id":"https://openalex.org/G692614662","display_name":null,"funder_award_id":"N00014-17-1-2950","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1533069212","https://openalex.org/W1976033800","https://openalex.org/W1978795557","https://openalex.org/W2023264348","https://openalex.org/W2025516544","https://openalex.org/W2063893206","https://openalex.org/W2064922498","https://openalex.org/W2107587098","https://openalex.org/W2116494573","https://openalex.org/W2137955810","https://openalex.org/W2185926888","https://openalex.org/W2532719504","https://openalex.org/W2734326062","https://openalex.org/W2783693896","https://openalex.org/W2898517998","https://openalex.org/W2900544456","https://openalex.org/W2945577986","https://openalex.org/W2947641560","https://openalex.org/W2971613094","https://openalex.org/W2996840464","https://openalex.org/W3013062889","https://openalex.org/W3016874508","https://openalex.org/W4244790824","https://openalex.org/W4285719527","https://openalex.org/W6666162271","https://openalex.org/W6768072071"],"related_works":["https://openalex.org/W2037416628","https://openalex.org/W2073725000","https://openalex.org/W2789752821","https://openalex.org/W2205502757","https://openalex.org/W2235483886","https://openalex.org/W1480508001","https://openalex.org/W2097812662","https://openalex.org/W1586372630","https://openalex.org/W2333804548","https://openalex.org/W1990828594"],"abstract_inverted_index":{"A":[0],"new":[1],"trend":[2],"in":[3,57,212],"system-on-chip":[4],"(SoC)":[5],"design":[6,68,85,176],"is":[7,86,141],"chiplet-based":[8],"IP":[9,101],"reuse":[10,48],"using":[11],"2.5-D":[12,81,173,183,213],"integration.":[13],"Complete":[14],"electronic":[15],"systems":[16],"can":[17],"be":[18],"created":[19],"through":[20,30],"the":[21,210],"integration":[22,54,184],"of":[23,42,49,55,172],"chiplets":[24,151],"on":[25,90,154],"an":[26],"interposer,":[27],"rather":[28],"than":[29],"a":[31,39,65,113,155],"monolithic":[32],"flow.":[33],"This":[34],"approach":[35],"expands":[36],"access":[37],"to":[38,76,136,144,163,208],"large":[40],"catalog":[41],"off-the-shelf":[43],"intellectual":[44],"properties":[45],"(IPs),":[46],"allows":[47],"them,":[50],"and":[51,74,78,107,149,167,170,188,205],"enables":[52],"heterogeneous":[53,80],"blocks":[56],"different":[58],"technologies.":[59],"In":[60],"this":[61],"article,":[62],"we":[63,132,197],"present":[64],"highly":[66],"integrated":[67,214],"flow":[69],"that":[70,182],"encompasses":[71],"architecture,":[72],"circuit,":[73],"package":[75,159],"build":[77],"simulate":[79],"designs.":[82,217],"Our":[83,158,175],"target":[84],"64core":[87],"architecture":[88],"based":[89],"Reduced":[91],"Instruction":[92],"Set":[93],"Computer":[94],"(RISC)-V":[95],"processor.":[96],"We":[97,111],"first":[98],"chipletize":[99],"each":[100],"by":[102],"adding":[103],"logical":[104],"protocol":[105],"translators":[106],"physical":[108,138],"interface":[109],"modules.":[110],"convert":[112],"given":[114],"register":[115],"transfer":[116],"level":[117],"(RTL)":[118],"for":[119,201],"64-core":[120],"processor":[121],"into":[122],"chiplets,":[123],"which":[124,140],"are":[125,152,161],"enhanced":[126],"with":[127,193],"our":[128,134],"centralized":[129],"network-onchip.":[130],"Next,":[131],"use":[133],"tool":[135],"obtain":[137],"layouts,":[139],"subsequently":[142],"used":[143,162],"synthesize":[145],"chip-to-chip":[146],"I/O":[147],"drivers":[148],"these":[150],"placed/routed":[153],"silicon":[156],"interposer.":[157],"models":[160],"calculate":[164],"power,":[165],"performance,":[166],"area":[168,190],"(PPA)":[169],"reliability":[171],"design.":[174],"space":[177],"exploration":[178],"(DSE)":[179],"study":[180],"shows":[181],"incurs":[185],"1.29\u00d7":[186],"power":[187,202],"2.19\u00d7":[189],"overheads":[191],"compared":[192],"2-D":[194],"counterpart.":[195],"Moreover,":[196],"perform":[198],"DSE":[199],"studies":[200],"delivery":[203],"scheme":[204],"interposer":[206],"technology":[207],"investigate":[209],"tradeoffs":[211],"chip":[215],"(IC)":[216]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":16},{"year":2024,"cited_by_count":41},{"year":2023,"cited_by_count":15},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":11}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
