{"id":"https://openalex.org/W3036663566","doi":"https://doi.org/10.1109/tvlsi.2020.3001526","title":"Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint","display_name":"Benchmark of the Compute-in-Memory-Based DNN Accelerator With Area Constraint","publication_year":2020,"publication_date":"2020-06-19","ids":{"openalex":"https://openalex.org/W3036663566","doi":"https://doi.org/10.1109/tvlsi.2020.3001526","mag":"3036663566"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2020.3001526","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2020.3001526","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072117537","display_name":"Anni Lu","orcid":"https://orcid.org/0000-0002-4415-0866"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anni Lu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":"https://orcid.org/0000-0002-4415-0866","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076031530","display_name":"Xiaochen Peng","orcid":"https://orcid.org/0000-0001-6148-7711"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaochen Peng","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":"https://orcid.org/0000-0001-6148-7711","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021633981","display_name":"Yandong Luo","orcid":"https://orcid.org/0000-0001-8239-0492"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yandong Luo","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":"https://orcid.org/0000-0001-8239-0492","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054894631","display_name":"Shimeng Yu","orcid":"https://orcid.org/0000-0002-0068-3652"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shimeng Yu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":"https://orcid.org/0000-0002-0068-3652","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":1.3528,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.80800549,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"28","issue":"9","first_page":"1945","last_page":"1952"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.808951735496521},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7540909051895142},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7175549268722534},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6297354698181152},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5647743940353394},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.5059065222740173},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.4582582712173462},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4439650774002075},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4196721017360687},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3749752938747406},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36669471859931946},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25856101512908936},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.16900181770324707},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09037899971008301}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.808951735496521},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7540909051895142},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7175549268722534},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6297354698181152},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5647743940353394},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.5059065222740173},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.4582582712173462},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4439650774002075},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4196721017360687},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3749752938747406},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36669471859931946},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25856101512908936},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.16900181770324707},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09037899971008301},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2020.3001526","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2020.3001526","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1686810756","https://openalex.org/W1937359183","https://openalex.org/W2163605009","https://openalex.org/W2194775991","https://openalex.org/W2508602506","https://openalex.org/W2518281301","https://openalex.org/W2613989746","https://openalex.org/W2782046614","https://openalex.org/W2787453651","https://openalex.org/W2787759178","https://openalex.org/W2790511620","https://openalex.org/W2885718248","https://openalex.org/W2905438605","https://openalex.org/W2912495531","https://openalex.org/W2912765464","https://openalex.org/W2919115771","https://openalex.org/W2962835968","https://openalex.org/W2997510972","https://openalex.org/W2997869757","https://openalex.org/W3003821665","https://openalex.org/W3005619596","https://openalex.org/W3006157302","https://openalex.org/W6637373629","https://openalex.org/W6684191040","https://openalex.org/W6748967906"],"related_works":["https://openalex.org/W2293118914","https://openalex.org/W2998381397","https://openalex.org/W4236419692","https://openalex.org/W3167919718","https://openalex.org/W4251718783","https://openalex.org/W2171015181","https://openalex.org/W4239447582","https://openalex.org/W1484403103","https://openalex.org/W1998888015","https://openalex.org/W1591308946"],"abstract_inverted_index":{"Compute-in-memory":[0],"(CIM)":[1],"is":[2,78,125],"a":[3,70,108],"promising":[4],"computing":[5],"paradigm":[6],"to":[7,18],"accelerate":[8],"the":[9,39,84,114,119,128],"inference":[10,77,129],"of":[11,83,110,130],"deep":[12],"neural":[13],"network":[14],"(DNN)":[15],"algorithms":[16],"due":[17],"its":[19],"high":[20],"processing":[21],"parallelism":[22],"and":[23,62,73,100,105,112,144],"energy":[24],"efficiency.":[25],"Prior":[26],"CIM-based":[27,57],"DNN":[28,58,76],"accelerators":[29,59],"mostly":[30],"consider":[31],"full":[32],"custom":[33],"design,":[34],"which":[35],"assumes":[36],"that":[37],"all":[38],"weights":[40,85,99,116],"are":[41,60,94,157],"stored":[42,88],"on-chip.":[43,89],"For":[44],"lightweight":[45],"smart":[46],"edge":[47],"devices,":[48],"this":[49,55],"assumption":[50],"may":[51],"not":[52],"hold.":[53],"In":[54],"article,":[56],"designed":[61],"benchmarked":[63],"under":[64],"different":[65,140],"chip":[66],"area":[67,141],"constraints.":[68],"First,":[69],"scheduling":[71],"strategy":[72],"dataflow":[74],"for":[75,127],"investigated":[79],"when":[80],"only":[81],"part":[82],"can":[86],"be":[87],"Two":[90],"weight":[91],"reload":[92,97],"schemes":[93],"evaluated:":[95],"1)":[96],"partial":[98,115],"reuse":[101,113],"input/output":[102],"feature":[103],"maps":[104],"2)":[106],"load":[107],"batch":[109],"input":[111],"on-chip":[117],"across":[118],"batch.":[120],"Then,":[121],"system-level":[122],"performance":[123],"benchmark":[124],"performed":[126],"ResNet-18":[131],"on":[132],"ImageNet":[133],"data":[134],"set.":[135],"The":[136],"design":[137],"tradeoffs":[138],"with":[139],"constraints,":[142],"dataflow,":[143],"device":[145],"technologies":[146],"[static":[147],"random":[148],"access":[149],"memory":[150],"(SRAM)":[151],"versus":[152],"ferroelectric":[153],"field-effect":[154],"transistor":[155],"(FeFET)]":[156],"discussed.":[158]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
