{"id":"https://openalex.org/W3015626316","doi":"https://doi.org/10.1109/tvlsi.2019.2956232","title":"A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines","display_name":"A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines","publication_year":2020,"publication_date":"2020-04-08","ids":{"openalex":"https://openalex.org/W3015626316","doi":"https://doi.org/10.1109/tvlsi.2019.2956232","mag":"3015626316"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2956232","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2956232","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100366004","display_name":"Lu Lu","orcid":"https://orcid.org/0000-0001-6745-622X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Lu Lu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056917810","display_name":"Taegeun Yoo","orcid":"https://orcid.org/0000-0001-9876-7725"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Taegeun Yoo","raw_affiliation_strings":["VIRTUS, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"VIRTUS, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045154871","display_name":"Van Loi Le","orcid":"https://orcid.org/0000-0002-8500-3176"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Van Loi Le","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076628109","display_name":"Tony Tae-Hyoung Kim","orcid":"https://orcid.org/0000-0002-1779-1799"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tony Tae-Hyoung Kim","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100366004"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":1.0375,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.76044664,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"28","issue":"6","first_page":"1345","last_page":"1356"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9105969667434692},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6862033009529114},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6510931849479675},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.6401764154434204},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.5763370394706726},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5512210726737976},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5503062605857849},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.5381048917770386},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4987337589263916},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.47086822986602783},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4459451735019684},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.44532978534698486},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.441081166267395},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4343506991863251},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4320404529571533},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4260692596435547},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40089067816734314},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3551408350467682},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.34190303087234497},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1811518371105194},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14567062258720398},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10160782933235168}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9105969667434692},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6862033009529114},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6510931849479675},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.6401764154434204},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.5763370394706726},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5512210726737976},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5503062605857849},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.5381048917770386},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4987337589263916},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.47086822986602783},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4459451735019684},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.44532978534698486},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.441081166267395},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4343506991863251},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4320404529571533},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4260692596435547},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40089067816734314},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3551408350467682},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.34190303087234497},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1811518371105194},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14567062258720398},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10160782933235168},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2019.2956232","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2956232","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1489111899","https://openalex.org/W1619268095","https://openalex.org/W1977983188","https://openalex.org/W1989243598","https://openalex.org/W1998798369","https://openalex.org/W2029712422","https://openalex.org/W2036742943","https://openalex.org/W2073818373","https://openalex.org/W2075221456","https://openalex.org/W2075778001","https://openalex.org/W2080441840","https://openalex.org/W2094648661","https://openalex.org/W2106339466","https://openalex.org/W2126898248","https://openalex.org/W2131427072","https://openalex.org/W2157743350","https://openalex.org/W2158609250","https://openalex.org/W2162173214","https://openalex.org/W2344272183","https://openalex.org/W2540920206","https://openalex.org/W2598698006","https://openalex.org/W2620295989","https://openalex.org/W2626693966","https://openalex.org/W2755826572","https://openalex.org/W2899871389","https://openalex.org/W2900674864","https://openalex.org/W2906754559","https://openalex.org/W4285719527","https://openalex.org/W6684073087"],"related_works":["https://openalex.org/W1909296377","https://openalex.org/W2089002058","https://openalex.org/W2118528827","https://openalex.org/W3185029353","https://openalex.org/W3217240813","https://openalex.org/W1521345290","https://openalex.org/W2172051594","https://openalex.org/W2150291080","https://openalex.org/W2029383304","https://openalex.org/W4391769493"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"an":[3],"8T":[4],"static":[5,61],"random":[6],"access":[7],"memory":[8],"(SRAM)":[9],"macro":[10],"with":[11,49],"vertical":[12,26,50],"read":[13,33,41],"wordline":[14],"(RWL)":[15],"and":[16,37,59,86],"selective":[17],"dual":[18],"split":[19],"power":[20],"(SDSP)":[21],"lines":[22],"techniques.":[23],"The":[24,44],"proposed":[25],"RWL":[27],"reduces":[28],"dynamic":[29],"energy":[30,78],"consumption":[31,79],"during":[32],"operation":[34],"by":[35],"charging":[36],"discharging":[38],"only":[39],"selected":[40],"bitlines":[42,52],"(RBLs).":[43],"data-aware":[45],"SDSP":[46],"technique":[47],"combined":[48],"write":[51,56],"enhances":[53],"both":[54],"the":[55,60,76,87],"margin":[57,63],"(WM)":[58],"noise":[62],"(SNM).":[64],"A":[65],"16-kb":[66],"SRAM":[67],"test":[68],"chip":[69],"fabricated":[70],"in":[71],"65-nm":[72],"CMOS":[73],"technology":[74],"demonstrates":[75],"minimum":[77,88],"of":[80,91],"0.506":[81],"pJ":[82],"at":[83],"0.4":[84],"V":[85],"operating":[89],"voltage":[90],"0.26":[92],"V.":[93]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
