{"id":"https://openalex.org/W2947567876","doi":"https://doi.org/10.1109/tvlsi.2019.2950087","title":"Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI","display_name":"Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI","publication_year":2019,"publication_date":"2019-12-02","ids":{"openalex":"https://openalex.org/W2947567876","doi":"https://doi.org/10.1109/tvlsi.2019.2950087","mag":"2947567876"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2950087","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2950087","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"preprint","indexed_in":["arxiv","crossref","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/1906.00478","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003158529","display_name":"Matheus Cavalcante","orcid":"https://orcid.org/0000-0001-9199-1708"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Matheus Cavalcante","raw_affiliation_strings":["Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland"],"raw_orcid":"https://orcid.org/0000-0001-9199-1708","affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024145677","display_name":"Fabian Schuiki","orcid":"https://orcid.org/0000-0002-9923-5031"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Fabian Schuiki","raw_affiliation_strings":["Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-9923-5031","affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058655278","display_name":"Florian Zaruba","orcid":"https://orcid.org/0000-0002-8194-6521"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Florian Zaruba","raw_affiliation_strings":["Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland"],"raw_orcid":"https://orcid.org/0000-0002-8194-6521","affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048307575","display_name":"Michael Schaffner","orcid":"https://orcid.org/0000-0002-3244-2693"},"institutions":[{"id":"https://openalex.org/I1291425158","display_name":"Google (United States)","ror":"https://ror.org/00njsd438","country_code":"US","type":"company","lineage":["https://openalex.org/I1291425158","https://openalex.org/I4210128969"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Schaffner","raw_affiliation_strings":["ASIC Development Team, Google Cloud Platforms, Sunnyvale, USA"],"raw_orcid":"https://orcid.org/0000-0002-3244-2693","affiliations":[{"raw_affiliation_string":"ASIC Development Team, Google Cloud Platforms, Sunnyvale, USA","institution_ids":["https://openalex.org/I1291425158"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]},{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland","University of Bologna, Bologna, Italy"],"raw_orcid":"https://orcid.org/0000-0001-8068-3806","affiliations":[{"raw_affiliation_string":"Integrated Systems Laboratory, ETH Z\u00fcrich, Z\u00fcrich, Switzerland","institution_ids":["https://openalex.org/I35440088"]},{"raw_affiliation_string":"University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4808,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.80779944,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"28","issue":"2","first_page":"530","last_page":"543"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.8580023050308228},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7124248743057251},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6736910343170166},{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.6069310307502747},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.6040230989456177},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.5956563353538513},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5912727117538452},{"id":"https://openalex.org/keywords/vector-processor","display_name":"Vector processor","score":0.5841127038002014},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.574393630027771},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5593765377998352},{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.5314344763755798},{"id":"https://openalex.org/keywords/linear-algebra","display_name":"Linear algebra","score":0.4380098879337311},{"id":"https://openalex.org/keywords/matrix","display_name":"Matrix (chemical analysis)","score":0.4323456287384033},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.42078089714050293},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.4182814955711365},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.25652211904525757},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21340695023536682},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10367515683174133}],"concepts":[{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.8580023050308228},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7124248743057251},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6736910343170166},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.6069310307502747},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.6040230989456177},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5956563353538513},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5912727117538452},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.5841127038002014},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.574393630027771},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5593765377998352},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.5314344763755798},{"id":"https://openalex.org/C139352143","wikidata":"https://www.wikidata.org/wiki/Q82571","display_name":"Linear algebra","level":2,"score":0.4380098879337311},{"id":"https://openalex.org/C106487976","wikidata":"https://www.wikidata.org/wiki/Q685816","display_name":"Matrix (chemical analysis)","level":2,"score":0.4323456287384033},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.42078089714050293},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.4182814955711365},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.25652211904525757},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21340695023536682},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10367515683174133},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.0}],"mesh":[],"locations_count":6,"locations":[{"id":"doi:10.1109/tvlsi.2019.2950087","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2950087","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:arXiv.org:1906.00478","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1906.00478","pdf_url":"https://arxiv.org/pdf/1906.00478","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"mag:2947567876","is_oa":true,"landing_page_url":"http://export.arxiv.org/pdf/1906.00478","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"arXiv (Cornell University)","raw_type":null},{"id":"pmh:oai:www.research-collection.ethz.ch:20.500.11850/382487","is_oa":true,"landing_page_url":"http://hdl.handle.net/20.500.11850/382487","pdf_url":null,"source":{"id":"https://openalex.org/S4306402302","display_name":"Repository for Publications and Research Data (ETH Zurich)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I35440088","host_organization_name":"ETH Zurich","host_organization_lineage":["https://openalex.org/I35440088"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28 (2)","raw_type":"info:eu-repo/semantics/acceptedVersion"},{"id":"doi:10.48550/arxiv.1906.00478","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.1906.00478","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article-journal"},{"id":"doi:10.3929/ethz-b-000382487","is_oa":true,"landing_page_url":"https://doi.org/10.3929/ethz-b-000382487","pdf_url":null,"source":{"id":"https://openalex.org/S7407051236","display_name":"ETH Z\u00fcrich Research Collection","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article-journal"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:1906.00478","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1906.00478","pdf_url":"https://arxiv.org/pdf/1906.00478","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1998525920","https://openalex.org/W2002555321","https://openalex.org/W2007267215","https://openalex.org/W2012252449","https://openalex.org/W2040073568","https://openalex.org/W2049009664","https://openalex.org/W2094969361","https://openalex.org/W2097117768","https://openalex.org/W2098335003","https://openalex.org/W2144481293","https://openalex.org/W2155503253","https://openalex.org/W2155729354","https://openalex.org/W2156413870","https://openalex.org/W2165974591","https://openalex.org/W2167399819","https://openalex.org/W2167897136","https://openalex.org/W2172307690","https://openalex.org/W2295862081","https://openalex.org/W2342710299","https://openalex.org/W2342840547","https://openalex.org/W2405227380","https://openalex.org/W2520759911","https://openalex.org/W2594429115","https://openalex.org/W2604319603","https://openalex.org/W2613264175","https://openalex.org/W2801629875","https://openalex.org/W2913795363","https://openalex.org/W2936567838","https://openalex.org/W2963255460","https://openalex.org/W2997350343","https://openalex.org/W4250981202","https://openalex.org/W6704545004","https://openalex.org/W6704559304"],"related_works":["https://openalex.org/W1995812446","https://openalex.org/W2319134828","https://openalex.org/W636812313","https://openalex.org/W3103292482","https://openalex.org/W2163439981","https://openalex.org/W2080083189","https://openalex.org/W2523456914","https://openalex.org/W187041579","https://openalex.org/W2018979449","https://openalex.org/W2551063852","https://openalex.org/W2111420767","https://openalex.org/W3011239373","https://openalex.org/W2541603716","https://openalex.org/W2946617513","https://openalex.org/W207179285","https://openalex.org/W2796919048","https://openalex.org/W2077923822","https://openalex.org/W2275552531","https://openalex.org/W1984924324","https://openalex.org/W2594523692"],"abstract_inverted_index":{"In":[0,97],"this":[1],"article,":[2],"we":[3],"present":[4],"Ara,":[5],"a":[6,38,66,91,138],"64-bit":[7],"vector":[8,18,49,122,144,154,171],"processor":[9],"based":[10],"on":[11,73,130],"the":[12,47,84,113,126,170,177],"version":[13],"0.5":[14],"draft":[15],"of":[16,37,40,46,99,140,176],"RISC-V's":[17],"extension,":[19],"implemented":[20],"in":[21,83,125],"GlobalFoundries":[22],"22FDX":[23],"fully":[24],"depleted":[25],"silicon-on-insulator":[26],"(FD-SOI)":[27],"technology.":[28],"Ara's":[29],"microarchitecture":[30],"is":[31,35,117],"scalable,":[32],"as":[33],"it":[34],"composed":[36],"set":[39],"identical":[41],"lanes,":[42],"each":[43],"containing":[44],"part":[45],"processor's":[48],"register":[50],"file":[51],"and":[52,143,151,156],"functional":[53],"units.":[54],"It":[55],"achieves":[56,103,173],"up":[57,93,104],"to":[58,94,105,120,159],"97%":[59],"floating-point":[60],"unit":[61],"(FPU)":[62],"utilization":[63,175],"when":[64],"running":[65],"256":[67,69],"\u00d7":[68],"double-precision":[70],"matrix":[71,142,167],"multiplication":[72],"16":[74],"lanes.":[75],"Ara":[76,102],"runs":[77],"at":[78],"more":[79],"than":[80],"1":[81],"GHz":[82],"typical":[85],"corner":[86],"(TT/0.80":[87],"V/25":[88],"\u00b0C),":[89],"achieving":[90],"performance":[92,149],"33":[95],"DP-GFLOPS.":[96],"terms":[98],"energy":[100,162],"efficiency,":[101],"41":[106],"DP-GFLOPS":[107],"W":[108],"<sup":[109],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[110],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-1</sup>":[111],"under":[112],"same":[114],"conditions,":[115],"which":[116],"slightly":[118],"superior":[119],"similar":[121],"processors":[123,155],"found":[124],"literature.":[127],"An":[128],"analysis":[129],"several":[131],"vectorizable":[132],"linear":[133],"algebra":[134],"computation":[135],"kernels":[136],"for":[137,153,165],"range":[139],"different":[141],"sizes":[145,168],"gives":[146],"insight":[147],"into":[148],"limitations":[150],"bottlenecks":[152],"outlines":[157],"directions":[158],"maintain":[160],"high":[161],"efficiency":[163],"even":[164],"small":[166],"where":[169],"architecture":[172],"suboptimal":[174],"available":[178],"FPUs.":[179]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}