{"id":"https://openalex.org/W2972279655","doi":"https://doi.org/10.1109/tvlsi.2019.2935227","title":"TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages","display_name":"TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages","publication_year":2019,"publication_date":"2019-09-05","ids":{"openalex":"https://openalex.org/W2972279655","doi":"https://doi.org/10.1109/tvlsi.2019.2935227","mag":"2972279655"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2935227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2935227","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078618657","display_name":"Shan Shen","orcid":"https://orcid.org/0000-0003-1383-463X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shan Shen","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057372251","display_name":"Tianxiang Shao","orcid":"https://orcid.org/0000-0003-4593-7756"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianxiang Shao","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039185900","display_name":"Xiaojing Shang","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaojing Shang","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101669121","display_name":"Yichen Guo","orcid":"https://orcid.org/0000-0002-7487-3205"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yichen Guo","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078395317","display_name":"Ming Ling","orcid":"https://orcid.org/0000-0002-8866-7189"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Ling","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":"https://orcid.org/0000-0002-8866-7189","affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030384645","display_name":"Jun Yang","orcid":"https://orcid.org/0000-0002-8379-0321"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun Yang","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":"https://orcid.org/0000-0002-8379-0321","affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101499715","display_name":"Longxing Shi","orcid":"https://orcid.org/0000-0002-0629-7154"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Longxing Shi","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.332,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.81450229,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"28","issue":"1","first_page":"252","last_page":"262"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8139421939849854},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6909946203231812},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6204642057418823},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4852283000946045},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4749046564102173},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.4366821050643921},{"id":"https://openalex.org/keywords/pipeline-burst-cache","display_name":"Pipeline burst cache","score":0.4238331913948059},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4212806820869446},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.36815476417541504},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.347581684589386},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32884490489959717},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2920551300048828},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22815263271331787},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14096665382385254}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8139421939849854},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6909946203231812},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6204642057418823},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4852283000946045},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4749046564102173},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.4366821050643921},{"id":"https://openalex.org/C157547923","wikidata":"https://www.wikidata.org/wiki/Q7197276","display_name":"Pipeline burst cache","level":5,"score":0.4238331913948059},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4212806820869446},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.36815476417541504},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.347581684589386},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32884490489959717},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2920551300048828},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22815263271331787},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14096665382385254}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2019.2935227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2935227","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G2396178287","display_name":null,"funder_award_id":"61974024","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5212510810","display_name":null,"funder_award_id":"6506000195","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5538578115","display_name":null,"funder_award_id":"BK20181141","funder_id":"https://openalex.org/F4320322769","funder_display_name":"Natural Science Foundation of Jiangsu Province"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320322769","display_name":"Natural Science Foundation of Jiangsu Province","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1974982221","https://openalex.org/W1998525920","https://openalex.org/W2047216488","https://openalex.org/W2052778063","https://openalex.org/W2077874318","https://openalex.org/W2104677471","https://openalex.org/W2112768159","https://openalex.org/W2136444750","https://openalex.org/W2137459077","https://openalex.org/W2144289559","https://openalex.org/W2156716091","https://openalex.org/W2161226639","https://openalex.org/W2162173214","https://openalex.org/W2166176901","https://openalex.org/W2289910803","https://openalex.org/W2290782358","https://openalex.org/W2325069102","https://openalex.org/W2343138575","https://openalex.org/W2515441589","https://openalex.org/W2541761778","https://openalex.org/W2806278919","https://openalex.org/W2898989913","https://openalex.org/W3193164062","https://openalex.org/W4236432903","https://openalex.org/W4242601976","https://openalex.org/W4249317113","https://openalex.org/W6684073087","https://openalex.org/W6755575121"],"related_works":["https://openalex.org/W2399041033","https://openalex.org/W2072955902","https://openalex.org/W2404820046","https://openalex.org/W2012518269","https://openalex.org/W2376113834","https://openalex.org/W1576527819","https://openalex.org/W2162744059","https://openalex.org/W3140186264","https://openalex.org/W2146079099","https://openalex.org/W2109715593"],"abstract_inverted_index":{"To":[0,75],"mitigate":[1],"the":[2,18,22,26,31,39,51,56,65,93,102,116,124,137,149,152,168,184,188,191,205],"ever-worsening":[3],"\u201cpower":[4],"wall\u201d":[5],"problem,":[6],"more":[7,9,44],"and":[8,92,119,140,167,201,210],"applications":[10],"need":[11],"to":[12,17,55,123,135,183,199],"expand":[13],"their":[14],"working":[15],"voltage":[16,41,53,153],"wide-voltage":[19],"range":[20],"including":[21],"nearthreshold":[23,40],"region.":[24],"However,":[25],"read":[27],"delay":[28,63],"distribution":[29],"of":[30,61,71,96,155],"static":[32,94],"random":[33],"access":[34,169],"memory":[35],"(SRAM)":[36],"cells":[37],"under":[38,50,144],"shows":[42],"a":[43,68,86,131,163],"serious":[45],"long-tail":[46],"characteristic":[47],"than":[48,177],"that":[49,178],"nominal":[52],"due":[54,122],"process":[57],"fluctuation.":[58],"Such":[59],"degradation":[60],"SRAM":[62],"makes":[64],"SRAM-based":[66],"cache":[67,97,134,138,194],"performance":[69],"bottleneck":[70],"systems":[72],"as":[73],"well.":[74],"avoid":[76],"unreliable":[77],"data":[78],"reading,":[79],"circuit-level":[80],"studies":[81,100],"use":[82],"larger/more":[83],"transistors":[84],"in":[85,110,179],"bitcell":[87],"by":[88,162],"sacrificing":[89],"chip":[90],"area":[91],"power":[95],"arrays.":[98],"Architectural":[99],"propose":[101],"auxiliary":[103],"error":[104,171],"correction":[105],"or":[106],"block":[107],"disabling/remapping":[108],"methods":[109],"fault-tolerant":[111],"caches,":[112],"which":[113],"worsen":[114],"both":[115],"hit":[117],"latency":[118],"energy":[120,142],"efficiency":[121,143],"complex":[125],"accessing":[126],"logic.":[127],"This":[128],"article":[129],"proposes":[130],"timing-speculation":[132],"(TS)":[133],"boost":[136],"frequency":[139,198],"improve":[141],"low":[145],"supply":[146,212],"voltages.":[147],"In":[148],"TS":[150,192],"cache,":[151],"differences":[154],"bitlines":[156],"(BLs)":[157],"are":[158],"continuously":[159],"evaluated":[160],"twice":[161],"sense":[164],"amplifier":[165],"(SA),":[166],"timing":[170],"can":[172],"be":[173],"detected":[174],"much":[175],"earlier":[176],"prior":[180],"methods.":[181],"According":[182],"measurement":[185],"results":[186],"from":[187],"fabricated":[189],"chips,":[190],"L1":[193],"aggressively":[195],"increases":[196],"its":[197],"1.62\u00d7":[200],"1.92\u00d7":[202],"compared":[203],"with":[204],"conventional":[206],"scheme":[207],"at":[208],"0.5-":[209],"0.6-V":[211],"voltages,":[213],"respectively.":[214]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2019-09-12T00:00:00"}