{"id":"https://openalex.org/W2952274626","doi":"https://doi.org/10.1109/tvlsi.2019.2919233","title":"An Efficient Diagnosis-Aware ATPG Procedure to Enhance Diagnosis Resolution and Test Compaction","display_name":"An Efficient Diagnosis-Aware ATPG Procedure to Enhance Diagnosis Resolution and Test Compaction","publication_year":2019,"publication_date":"2019-06-20","ids":{"openalex":"https://openalex.org/W2952274626","doi":"https://doi.org/10.1109/tvlsi.2019.2919233","mag":"2952274626"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2919233","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2919233","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103259979","display_name":"Cheng-Hung Wu","orcid":"https://orcid.org/0000-0002-0475-5756"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hung Wu","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Corporation (TSMC), Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-0475-5756","affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Corporation (TSMC), Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079657769","display_name":"Kuen-Jong Lee","orcid":"https://orcid.org/0000-0002-6690-0074"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuen-Jong Lee","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-6690-0074","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077101123","display_name":"S.M. Reddy","orcid":"https://orcid.org/0000-0001-9208-8262"},"institutions":[{"id":"https://openalex.org/I126307644","display_name":"University of Iowa","ror":"https://ror.org/036jqmy94","country_code":"US","type":"education","lineage":["https://openalex.org/I126307644"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhakar M. Reddy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Iowa, Iowa, IA, USA"],"raw_orcid":"https://orcid.org/0000-0001-9208-8262","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Iowa, Iowa, IA, USA","institution_ids":["https://openalex.org/I126307644"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4808,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.8100785,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"27","issue":"9","first_page":"2105","last_page":"2118"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.931999921798706},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.7825489044189453},{"id":"https://openalex.org/keywords/stuck-at-fault","display_name":"Stuck-at fault","score":0.6999370455741882},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.6718600988388062},{"id":"https://openalex.org/keywords/trimming","display_name":"Trimming","score":0.6132338047027588},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6072731614112854},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.46320948004722595},{"id":"https://openalex.org/keywords/fault-model","display_name":"Fault model","score":0.43796199560165405},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.437654048204422},{"id":"https://openalex.org/keywords/fault-indicator","display_name":"Fault indicator","score":0.41884803771972656},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3539586067199707},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.19583365321159363},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1852734088897705}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.931999921798706},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.7825489044189453},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.6999370455741882},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.6718600988388062},{"id":"https://openalex.org/C56951928","wikidata":"https://www.wikidata.org/wiki/Q3539213","display_name":"Trimming","level":2,"score":0.6132338047027588},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6072731614112854},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.46320948004722595},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.43796199560165405},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.437654048204422},{"id":"https://openalex.org/C21267803","wikidata":"https://www.wikidata.org/wiki/Q5438159","display_name":"Fault indicator","level":4,"score":0.41884803771972656},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3539586067199707},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.19583365321159363},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1852734088897705},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2019.2919233","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2919233","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions"}],"awards":[{"id":"https://openalex.org/G3489697069","display_name":null,"funder_award_id":"MOST 107-2218-E-006-025","funder_id":"https://openalex.org/F4320321040","funder_display_name":"National Science Council"}],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1507615093","https://openalex.org/W1843392114","https://openalex.org/W1849928240","https://openalex.org/W1864256460","https://openalex.org/W1973423723","https://openalex.org/W1975922194","https://openalex.org/W1987398152","https://openalex.org/W2014953362","https://openalex.org/W2016114271","https://openalex.org/W2089128866","https://openalex.org/W2106183788","https://openalex.org/W2115005577","https://openalex.org/W2131814033","https://openalex.org/W2133512509","https://openalex.org/W2138735239","https://openalex.org/W2143846508","https://openalex.org/W2145986592","https://openalex.org/W2150780157","https://openalex.org/W2152489029","https://openalex.org/W2159254834","https://openalex.org/W2161229078","https://openalex.org/W2612483706","https://openalex.org/W4230940000","https://openalex.org/W6672822051","https://openalex.org/W6681228468","https://openalex.org/W6683224512"],"related_works":["https://openalex.org/W2340957901","https://openalex.org/W4256030018","https://openalex.org/W2147400189","https://openalex.org/W1555400249","https://openalex.org/W2051500795","https://openalex.org/W2031110496","https://openalex.org/W1519923721","https://openalex.org/W3147038789","https://openalex.org/W2157154381","https://openalex.org/W2568949342"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"an":[3,60],"efficient":[4],"diagnosis-aware":[5],"automatic":[6],"test":[7,96,152,156,213],"pattern":[8,64],"generation":[9,65,153,157,214],"(ATPG)":[10],"procedure":[11,40,222],"that":[12,35,84,103,125,139,201,219,227,254],"can":[13,47,127],"quickly":[14,77],"identify":[15,184],"equivalent-fault":[16],"pairs":[17,83,102,161,187,192,233],"and":[18,237,241],"generate":[19,49,78,128],"diagnosis":[20,63,129,155],"patterns":[21,97],"(DPs)":[22],"for":[23,80,131,158,244],"nonequivalent-fault":[24],"pairs,":[25,175],"where":[26],"a":[27,55,89,109,119,176,250],"(non)equivalent":[28],"fault":[29,71,82,94,101,160,174,186,191,232],"pair":[30,134,141],"contains":[31,41],"two":[32,170],"stuck-at":[33],"faults":[34,136,143],"are":[36],"(non)equivalent.":[37],"The":[38],"proposed":[39,221],"three":[42],"main":[43],"methods,":[44],"which":[45,68],"together":[46],"efficiently":[48],"highly":[50],"compacted":[51],"DPs":[52,79],"by":[53,88,107,193],"using":[54,249],"conventional":[56,251],"ATPG":[57,112,252],"tool.":[58],"First,":[59],"all-pairs":[61],"at-a-time":[62],"(AFPAT-DPG)":[66],"method,":[67],"adopts":[69],"user-defined":[70],"models":[72],"(UDFMs),":[73],"is":[74,115,118,144,181,202,223],"employed":[75],"to":[76,148,183,205,257],"most":[81],"cannot":[85,104],"be":[86,105,163],"distinguished":[87,106],"given":[90],"set":[91],"of,":[92],"typically":[93],"detection,":[95],"(TP).":[98],"For":[99,172],"those":[100],"AFPAT-DPG,":[108],"multipair":[110],"diagnostic":[111],"method":[113,121,180],"(MP-DATPG)":[114],"used.":[116],"MP-DATPG":[117],"complete":[120],"in":[122,151,234],"the":[123,140,166,169,189,195,208,212,220,224],"sense":[124],"it":[126],"tests":[130,256],"every":[132],"distinguishable":[133],"of":[135,142,168,211,230],"or":[137],"prove":[138],"indistinguishable.":[145],"However,":[146],"due":[147],"back-track":[149,209],"limits":[150,210],"procedures,":[154],"some":[159],"may":[162],"aborted":[164,190],"after":[165],"application":[167],"methods.":[171],"such":[173],"subcircuit":[177],"analysis":[178],"(SCA)":[179],"applied":[182],"equivalent":[185],"among":[188],"trimming":[194],"circuit":[196],"under":[197],"consideration":[198],"into":[199],"one":[200],"much":[203],"easier":[204],"process":[206],"within":[207],"procedures.":[215],"Experimental":[216],"results":[217],"show":[218],"first":[225],"work":[226],"distinguishes":[228],"100%":[229],"all":[231,235,245],"ISCAS'89":[236],"IWLS'05":[238],"benchmark":[239,247],"circuits":[240,248],"over":[242],"99.99%":[243],"ITC'99":[246],"tool":[253],"generates":[255],"detect":[258],"faults.":[259]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}