{"id":"https://openalex.org/W2947975033","doi":"https://doi.org/10.1109/tvlsi.2019.2903116","title":"Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate","display_name":"Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate","publication_year":2019,"publication_date":"2019-03-22","ids":{"openalex":"https://openalex.org/W2947975033","doi":"https://doi.org/10.1109/tvlsi.2019.2903116","mag":"2947975033"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2903116","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2903116","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009294144","display_name":"Anindita Paul","orcid":"https://orcid.org/0000-0002-1381-8050"},"institutions":[{"id":"https://openalex.org/I10052268","display_name":"New Mexico State University","ror":"https://ror.org/00hpz7z43","country_code":"US","type":"education","lineage":["https://openalex.org/I10052268"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anindita Paul","raw_affiliation_strings":["Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA#TAB#"],"raw_orcid":"https://orcid.org/0000-0002-1381-8050","affiliations":[{"raw_affiliation_string":"Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA#TAB#","institution_ids":["https://openalex.org/I10052268"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045738320","display_name":"J. Ram\u0131\u0301rez-Angulo","orcid":"https://orcid.org/0000-0001-5977-616X"},"institutions":[{"id":"https://openalex.org/I10052268","display_name":"New Mexico State University","ror":"https://ror.org/00hpz7z43","country_code":"US","type":"education","lineage":["https://openalex.org/I10052268"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaime Ramirez-Angulo","raw_affiliation_strings":["Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA#TAB#"],"raw_orcid":"https://orcid.org/0000-0001-5977-616X","affiliations":[{"raw_affiliation_string":"Klipsch School of Electrical and Computer Engineering, New Mexico State University, Las Cruces, NM, USA#TAB#","institution_ids":["https://openalex.org/I10052268"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078762976","display_name":"A. Torralba","orcid":"https://orcid.org/0000-0001-6887-6146"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Torralba","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Escuela Superior de Ingenier\u00eda, University of Seville, Seville, Spain"],"raw_orcid":"https://orcid.org/0000-0001-6887-6146","affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Escuela Superior de Ingenier\u00eda, University of Seville, Seville, Spain","institution_ids":["https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9679,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.72975744,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"27","issue":"6","first_page":"1353","last_page":"1364"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.7535865306854248},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6608411073684692},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5130001902580261},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5117854475975037},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4339728057384491},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.43282997608184814},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.36918604373931885},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2591155767440796},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23745712637901306},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12980526685714722},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10467162728309631}],"concepts":[{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.7535865306854248},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6608411073684692},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5130001902580261},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5117854475975037},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4339728057384491},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.43282997608184814},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.36918604373931885},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2591155767440796},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23745712637901306},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12980526685714722},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10467162728309631},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2019.2903116","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2903116","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.75,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1658493671","https://openalex.org/W1966519606","https://openalex.org/W1976201664","https://openalex.org/W2031947783","https://openalex.org/W2037768116","https://openalex.org/W2038783544","https://openalex.org/W2065389542","https://openalex.org/W2076420009","https://openalex.org/W2095471364","https://openalex.org/W2101809138","https://openalex.org/W2116608199","https://openalex.org/W2138536318","https://openalex.org/W2508660439","https://openalex.org/W2577762902","https://openalex.org/W2761742001","https://openalex.org/W2789404248","https://openalex.org/W2803950919","https://openalex.org/W2970528191","https://openalex.org/W3143557273","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2014419659","https://openalex.org/W2001806842","https://openalex.org/W1824395157","https://openalex.org/W2372895414","https://openalex.org/W2070352314","https://openalex.org/W2118449739","https://openalex.org/W2075976706","https://openalex.org/W2354568776","https://openalex.org/W2369781286","https://openalex.org/W2104884519"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,24,50,120],"bandwidth":[4],"(BW)-":[5],"and":[6,23,49,92,116],"slew":[7],"rate":[8],"(SR)-enhanced":[9],"class":[10],"AB":[11],"voltage":[12],"follower":[13],"(VF).":[14],"A":[15],"thorough":[16],"small":[17],"signal":[18],"analysis":[19],"of":[20,53,55,119],"the":[21,98,125,130],"proposed":[22,35,131],"state-of-the-art":[25],"AB-enhanced":[26],"VF":[27,100],"is":[28],"presented":[29],"to":[30],"compare":[31],"their":[32],"performance.":[33],"The":[34,114],"circuit":[36],"has":[37],"50-MHz":[38],"BW,":[39],"19.5-V/":[40],"$\\mu":[43,69,106],"\\text{s}$":[44],"SR,":[48],"BW":[51,96],"figure":[52],"merit":[54],"41.6":[56],"(MHz":[57],"$\\times":[61],"$":[62],"pF/":[66],"\\text{W}$":[70,107],")":[73],"for":[74],"$C_{L}":[78],"=":[79],"50$":[80],"pF.":[84],"It":[85],"provides":[86],"13":[87],"times":[88,94],"higher":[89,95],"current":[90],"efficiency":[91],"15":[93],"than":[97],"conventional":[99],"with":[101],"equal":[102],"60-":[103],"static":[111],"power":[112],"dissipation.":[113],"experimental":[115],"simulation":[117],"results":[118],"fabricated":[121],"test":[122],"chip":[123],"in":[124],"130-nm":[126],"CMOS":[127],"technology":[128],"validate":[129],"circuit.":[132]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}