{"id":"https://openalex.org/W2911301864","doi":"https://doi.org/10.1109/tvlsi.2019.2895361","title":"A 13-bit 8-kS/s &lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;$\\Delta$ &lt;/tex-math&gt; &lt;/inline-formula&gt;\u2013&lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;$\\Sigma$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Readout IC Using ZCB Integrators With an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR","display_name":"A 13-bit 8-kS/s &lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;$\\Delta$ &lt;/tex-math&gt; &lt;/inline-formula&gt;\u2013&lt;inline-formula&gt; &lt;tex-math notation=\"LaTeX\"&gt;$\\Sigma$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Readout IC Using ZCB Integrators With an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR","publication_year":2019,"publication_date":"2019-02-13","ids":{"openalex":"https://openalex.org/W2911301864","doi":"https://doi.org/10.1109/tvlsi.2019.2895361","mag":"2911301864"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2019.2895361","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2895361","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100451297","display_name":"Bing Li","orcid":"https://orcid.org/0000-0002-8951-6112"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bing Li","raw_affiliation_strings":["College of Electronic Science and Technology, Shenzhen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-8951-6112","affiliations":[{"raw_affiliation_string":"College of Electronic Science and Technology, Shenzhen University, Shenzhen, China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031104846","display_name":"Ji-Ping Na","orcid":null},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ji-Ping Na","raw_affiliation_strings":["College of Electronic Science and Technology, Shenzhen University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Electronic Science and Technology, Shenzhen University, Shenzhen, China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100392010","display_name":"Wei Wang","orcid":"https://orcid.org/0000-0002-5608-1319"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Wang","raw_affiliation_strings":["College of Electronic Science and Technology, Shenzhen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-5608-1319","affiliations":[{"raw_affiliation_string":"College of Electronic Science and Technology, Shenzhen University, Shenzhen, China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102748871","display_name":"Jia Liu","orcid":"https://orcid.org/0000-0003-2171-6764"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jia Liu","raw_affiliation_strings":["College of Electronic Science and Technology, Shenzhen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0003-2171-6764","affiliations":[{"raw_affiliation_string":"College of Electronic Science and Technology, Shenzhen University, Shenzhen, China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101559528","display_name":"Qian Yang","orcid":"https://orcid.org/0000-0002-5447-9884"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qian Yang","raw_affiliation_strings":["College of Electronic Science and Technology, Shenzhen University, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-5447-9884","affiliations":[{"raw_affiliation_string":"College of Electronic Science and Technology, Shenzhen University, Shenzhen, China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui\u2010In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Pui-In Mak","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Macau, Macao, China"],"raw_orcid":"https://orcid.org/0000-0002-3579-8740","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5808,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.63275619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"27","issue":"4","first_page":"843","last_page":"853"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-supply-rejection-ratio","display_name":"Power supply rejection ratio","score":0.7260681986808777},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.5321385860443115},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.5297787189483643},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5136906504631042},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.4307110607624054},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.42482230067253113},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40237101912498474},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3131815791130066},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.29748210310935974},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.27689576148986816},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.27032896876335144},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.1266358494758606}],"concepts":[{"id":"https://openalex.org/C15892472","wikidata":"https://www.wikidata.org/wiki/Q1482413","display_name":"Power supply rejection ratio","level":4,"score":0.7260681986808777},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5321385860443115},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.5297787189483643},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5136906504631042},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.4307110607624054},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42482230067253113},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40237101912498474},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3131815791130066},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.29748210310935974},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.27689576148986816},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.27032896876335144},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.1266358494758606}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2019.2895361","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2019.2895361","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G4193960629","display_name":null,"funder_award_id":"2016A030310057","funder_id":"https://openalex.org/F4320321921","funder_display_name":"Natural Science Foundation of Guangdong Province"},{"id":"https://openalex.org/G8112883270","display_name":null,"funder_award_id":"61504086","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320321921","display_name":"Natural Science Foundation of Guangdong Province","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1535442691","https://openalex.org/W1941414088","https://openalex.org/W1992137999","https://openalex.org/W2003730876","https://openalex.org/W2018937885","https://openalex.org/W2023778232","https://openalex.org/W2043633993","https://openalex.org/W2044489809","https://openalex.org/W2058792612","https://openalex.org/W2073377108","https://openalex.org/W2101556294","https://openalex.org/W2112611349","https://openalex.org/W2124730281","https://openalex.org/W2135915657","https://openalex.org/W2151631707","https://openalex.org/W2173300498","https://openalex.org/W2464699181","https://openalex.org/W2478721325","https://openalex.org/W2502689916","https://openalex.org/W2557755300","https://openalex.org/W2585428229","https://openalex.org/W2593783623","https://openalex.org/W2731271585","https://openalex.org/W2743307634","https://openalex.org/W2773134638","https://openalex.org/W2789740360","https://openalex.org/W2800482742","https://openalex.org/W4237500539"],"related_works":["https://openalex.org/W2366352762","https://openalex.org/W2613964090","https://openalex.org/W2055545425","https://openalex.org/W2055315449","https://openalex.org/W2380425739","https://openalex.org/W2198645257","https://openalex.org/W67296738","https://openalex.org/W574432569","https://openalex.org/W2109445684","https://openalex.org/W2156154954"],"abstract_inverted_index":{"This":[0],"paper":[1],"reports":[2],"on":[3],"an":[4,106],"energy-efficient":[5],"\u0394-\u03a3":[6,48],"readout":[7],"IC":[8],"(ROIC)":[9],"with":[10],"a":[11,24,60,100,113,121],"high":[12],"power-supply-rejection":[13],"ratio":[14],"(PSRR).":[15],"The":[16,128],"static":[17],"power":[18],"consumption":[19],"is":[20,37,132],"minimized":[21],"by":[22],"applying":[23],"zero-crossing-based":[25],"(ZCB)":[26],"circuit":[27,41],"to":[28,42,120],"implement":[29],"switched-capacitor":[30],"(SC)":[31],"integrators,":[32],"while":[33,64],"the":[34,40,44,53,57,66,71,92,96,136],"resistive":[35],"sensor":[36],"embedded":[38],"inside":[39],"reuse":[43],"bias":[45],"current.":[46],"Oversampling":[47],"modulation":[49],"also":[50],"directly":[51],"provides":[52],"digitized":[54],"output,":[55],"avoiding":[56],"need":[58],"for":[59,95],"power-hungry":[61],"instrumentation":[62],"amplifier":[63],"preserving":[65],"linear":[67],"settling":[68],"behavior":[69],"of":[70,83,102,109,116,123,125],"ZCB":[72],"SC":[73],"integrators.":[74],"A":[75],"dual-path":[76,93],"bridge":[77,86,97],"measurement":[78,98],"aids":[79],"in":[80,89],"upholding":[81],"PSRR":[82,131],"ROIC":[84,94],"against":[85],"imbalance.":[87],"Prototyped":[88],"0.18-\u03bcm":[90],"CMOS,":[91],"shows":[99],"nonlinearity":[101],"c400":[103],"ppm":[104],"and":[105,135,138,143],"rms-noise-equivalent":[107],"resolution":[108],"13":[110],"bits":[111],"at":[112],"conversion":[114],"rate":[115],"8":[117],"kS/s,":[118],"corresponding":[119],"figure":[122],"merit":[124],"1.05-pJ/conversion":[126],"step.":[127],"achieved":[129],"noise-frequencyindependent":[130],"65":[133],"dB,":[134],"supply":[137],"temperature":[139],"sensitivities":[140],"are":[141],"0.23%/V":[142],"55":[144],"ppm/\u00b0C,":[145],"respectively.":[146]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
