{"id":"https://openalex.org/W2888377996","doi":"https://doi.org/10.1109/tvlsi.2018.2862388","title":"Bit-Level Disturbance-Aware Memory Partitioning for Parallel Data Access for MLC STT-RAM","display_name":"Bit-Level Disturbance-Aware Memory Partitioning for Parallel Data Access for MLC STT-RAM","publication_year":2018,"publication_date":"2018-08-24","ids":{"openalex":"https://openalex.org/W2888377996","doi":"https://doi.org/10.1109/tvlsi.2018.2862388","mag":"2888377996"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2018.2862388","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2862388","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054524841","display_name":"Shouyi Yin","orcid":"https://orcid.org/0000-0003-2309-572X"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Shouyi Yin","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101715346","display_name":"Tianyi Lu","orcid":"https://orcid.org/0000-0001-6388-3419"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianyi Lu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048421187","display_name":"Zhicong Xie","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhicong Xie","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100358856","display_name":"Leibo Liu","orcid":"https://orcid.org/0000-0001-7548-4116"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Leibo Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036023084","display_name":"Shaojun Wei","orcid":"https://orcid.org/0000-0001-5117-7920"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shaojun Wei","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5054524841"],"corresponding_institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.3902,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.66153778,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"26","issue":"11","first_page":"2345","last_page":"2357"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7934496998786926},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5805812478065491},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5101316571235657},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4914647340774536},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4688509404659271},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.46533480286598206},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.45855802297592163},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.41935092210769653},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4055666923522949},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3642716705799103}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7934496998786926},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5805812478065491},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5101316571235657},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4914647340774536},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4688509404659271},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.46533480286598206},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.45855802297592163},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.41935092210769653},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4055666923522949},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3642716705799103},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2018.2862388","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2862388","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G488652191","display_name":null,"funder_award_id":"61774094","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1978229152","https://openalex.org/W1988382391","https://openalex.org/W2001108445","https://openalex.org/W2010202670","https://openalex.org/W2028342110","https://openalex.org/W2031539925","https://openalex.org/W2053331999","https://openalex.org/W2058625399","https://openalex.org/W2085577656","https://openalex.org/W2091685042","https://openalex.org/W2093958639","https://openalex.org/W2100799944","https://openalex.org/W2101717804","https://openalex.org/W2110158442","https://openalex.org/W2118870365","https://openalex.org/W2121927366","https://openalex.org/W2143230897","https://openalex.org/W2154689013","https://openalex.org/W2293376937","https://openalex.org/W2532269050","https://openalex.org/W2624847105","https://openalex.org/W2747816535","https://openalex.org/W3105500088","https://openalex.org/W3145579537","https://openalex.org/W3151034118","https://openalex.org/W3151493671","https://openalex.org/W4238440425"],"related_works":["https://openalex.org/W1768207225","https://openalex.org/W4224882440","https://openalex.org/W1697439211","https://openalex.org/W2058625399","https://openalex.org/W2144828158","https://openalex.org/W2141090105","https://openalex.org/W2294275150","https://openalex.org/W2048417150","https://openalex.org/W2755934345","https://openalex.org/W3042352451"],"abstract_inverted_index":{"Spin-transfer":[0],"torque":[1],"random":[2],"access":[3,117],"memory":[4,14,20,62,76,110],"(STT-RAM)":[5],"is":[6,53,81,100],"one":[7],"of":[8,61,67,94,140,157,193],"the":[9,59,65,92,97,125,137,144,166,171,188],"most":[10],"promising":[11],"emerging":[12],"nonvolatile":[13],"technologies":[15],"suitable":[16],"for":[17,91,114],"substituting":[18],"traditional":[19],"due":[21],"to":[22,57,74,147,150,169],"its":[23],"fascinating":[24],"features,":[25],"such":[26],"as":[27],"high":[28],"density":[29],"and":[30,130,160,199],"low-leakage":[31],"power.":[32],"Multilevel":[33],"cell":[34],"(MLC)":[35],"STT-RAM":[36,80,173],"stores":[37],"two":[38],"or":[39],"more":[40],"bits":[41],"in":[42,191],"a":[43,107],"single":[44],"cell,":[45],"which":[46,133],"can":[47,122],"boost":[48],"data":[49,69,116,181],"density.":[50],"Memory":[51],"partitioning":[52,77,111],"an":[54,179],"efficient":[55],"method":[56,113,190],"overcome":[58],"impediment":[60],"bandwidth":[63],"restricting":[64],"speed":[66],"parallel":[68,115],"access.":[70],"However,":[71],"when":[72],"applied":[73],"previous":[75],"methods,":[78],"MLC":[79,119,172],"still":[82],"facing":[83],"challenges.":[84],"Since":[85],"these":[86],"methods":[87],"have":[88],"no":[89],"respect":[90],"issue":[93],"read":[95,128,138],"disturbance,":[96],"computation":[98],"performance":[99],"unsatisfactory.":[101],"In":[102],"this":[103],"paper,":[104],"we":[105],"propose":[106],"bit-level":[108,154],"disturbance-aware":[109],"(BaMP)":[112],"on":[118,178],"STT-RAM.":[120],"It":[121],"effectively":[123],"eliminate":[124],"conflicts":[126],"between":[127],"operations":[129,146],"check":[131,145,158,161],"operations,":[132],"are":[134,163],"caused":[135],"by":[136,142],"disturbance":[139],"STT-RAM,":[141],"scheduling":[143],"different":[148],"time":[149],"avoid":[151],"conflicts.":[152],"Moreover,":[153],"optimization":[155],"strategies":[156],"merging":[159],"reducing":[162],"integrated":[164],"into":[165],"BaMP":[167,186],"flow":[168],"exploit":[170],"structure.":[174],"The":[175],"evaluation":[176],"results":[177],"open":[180],"set":[182],"show":[183],"that":[184],"our":[185],"outperforms":[187],"state-of-the-art":[189],"terms":[192],"bank":[194],"number,":[195],"storage":[196],"overhead,":[197],"performance,":[198],"searching":[200],"speed.":[201]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
