{"id":"https://openalex.org/W2808558511","doi":"https://doi.org/10.1109/tvlsi.2018.2838591","title":"A Multi-Gb/s Frame-Interleaved LDPC Decoder With Path-Unrolled Message Passing in 28-nm CMOS","display_name":"A Multi-Gb/s Frame-Interleaved LDPC Decoder With Path-Unrolled Message Passing in 28-nm CMOS","publication_year":2018,"publication_date":"2018-06-14","ids":{"openalex":"https://openalex.org/W2808558511","doi":"https://doi.org/10.1109/tvlsi.2018.2838591","mag":"2808558511"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2018.2838591","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2838591","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028065386","display_name":"Mario Milicevic","orcid":"https://orcid.org/0000-0001-6365-6195"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Mario Milicevic","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031283069","display_name":"P.G. Gulak","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"P. Glenn Gulak","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5028065386"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":4.0693,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.94296867,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"26","issue":"10","first_page":"1908","last_page":"1921"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.9901000261306763,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6870694756507874},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6307202577590942},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.6042723655700684},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5735804438591003},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.53337562084198},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.49895787239074707},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.49158820509910583},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.48048892617225647},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47147324681282043},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3915349841117859},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.31661394238471985},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.24807849526405334},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.130121111869812},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11295497417449951},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09321877360343933}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6870694756507874},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6307202577590942},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.6042723655700684},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5735804438591003},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.53337562084198},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49895787239074707},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.49158820509910583},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.48048892617225647},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47147324681282043},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3915349841117859},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31661394238471985},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.24807849526405334},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.130121111869812},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11295497417449951},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09321877360343933},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2018.2838591","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2838591","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W1573665190","https://openalex.org/W1864365761","https://openalex.org/W1895823289","https://openalex.org/W1973712217","https://openalex.org/W1984739203","https://openalex.org/W1990436563","https://openalex.org/W2007283083","https://openalex.org/W2032886564","https://openalex.org/W2036761236","https://openalex.org/W2046091144","https://openalex.org/W2058275835","https://openalex.org/W2069459707","https://openalex.org/W2075568400","https://openalex.org/W2087083263","https://openalex.org/W2091764549","https://openalex.org/W2095858451","https://openalex.org/W2096084217","https://openalex.org/W2107301532","https://openalex.org/W2109078033","https://openalex.org/W2109098125","https://openalex.org/W2117447277","https://openalex.org/W2123530431","https://openalex.org/W2124415524","https://openalex.org/W2125117492","https://openalex.org/W2126259959","https://openalex.org/W2127490352","https://openalex.org/W2128411064","https://openalex.org/W2128765501","https://openalex.org/W2133068391","https://openalex.org/W2135764410","https://openalex.org/W2137813581","https://openalex.org/W2138551264","https://openalex.org/W2140772839","https://openalex.org/W2149424399","https://openalex.org/W2243559121","https://openalex.org/W2292279193","https://openalex.org/W2545269319","https://openalex.org/W2559248858","https://openalex.org/W2585197256","https://openalex.org/W2753909399","https://openalex.org/W4240704246","https://openalex.org/W6658657388","https://openalex.org/W6676339885","https://openalex.org/W6690407456","https://openalex.org/W6728761915"],"related_works":["https://openalex.org/W2903058006","https://openalex.org/W2102374550","https://openalex.org/W2047069332","https://openalex.org/W2352157218","https://openalex.org/W4213381250","https://openalex.org/W2806845321","https://openalex.org/W4293418541","https://openalex.org/W2362169398","https://openalex.org/W3083915265","https://openalex.org/W2139353707"],"abstract_inverted_index":{"This":[0,207],"paper":[1,208],"presents":[2],"a":[3,11,85,126,160],"frame-interleaved":[4],"low-density":[5],"parity-check":[6,29],"(LDPC)":[7],"decoder":[8,88],"architecture":[9,22],"with":[10],"new":[12],"interconnect":[13],"partitioning":[14],"scheme":[15],"and":[16,50,72,124,154,176,187,192,204,229],"time-distributed":[17],"Min-Sum":[18],"decoding":[19,133,146],"schedule.":[20],"The":[21,104],"exploits":[23],"the":[24,28,79,82,94,99,142,148,195,210,221],"cyclic":[25],"structure":[26],"of":[27,81,109,119,128,157,165],"matrix":[30],"by":[31],"unrolling":[32],"each":[33],"check":[34],"node":[35],"update":[36],"in":[37,44,98,141,181],"time":[38],"over":[39],"all":[40,136],"connected":[41],"variable":[42],"nodes":[43],"order":[45],"to":[46,56,66,74],"minimize":[47],"wiring":[48],"complexity":[49],"power.":[51,76],"Multiple":[52],"frames":[53],"are":[54],"interleaved":[55],"maximize":[57],"hardware":[58],"utilization,":[59],"while":[60],"coarse-grained":[61],"clock":[62,178,227],"gating":[63],"is":[64],"used":[65],"systematically":[67],"turn":[68],"off":[69],"inactive":[70],"logic":[71],"memories":[73],"save":[75],"To":[77],"demonstrate":[78],"scalability":[80],"proposed":[83],"architecture,":[84],"multirate":[86],"LDPC":[87],"test":[89],"chip":[90,150,197],"was":[91],"fabricated":[92,149,196],"for":[93,135,220],"IEEE":[95,222],"802.11ad":[96,223],"standard":[97,224],"28-nm":[100],"CMOS":[101],"technology":[102],"node.":[103],"design":[105],"occupies":[106],"an":[107,182,199],"area":[108],"1.99":[110],"mm":[111],"<sup":[112,167],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[113,168],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[114],",":[115],"contains":[116],"160":[117],"Kb":[118],"embedded":[120],"static":[121],"random-access":[122],"memory,":[123],"achieves":[125,198,209],"throughput":[127],"6.78":[129],"Gb/s":[130],"at":[131,159,173,225],"10":[132,166],"iterations":[134],"four":[137],"code":[138],"rates":[139],"specified":[140],"standard.":[143],"With":[144,190],"early":[145],"termination,":[147],"consumes":[151],"between":[152,185,202],"104":[153],"279":[155],"mW":[156],"power":[158],"target":[161],"bit":[162],"error":[163],"rate":[164],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">\u22126</sup>":[169],"under":[170],"nominal":[171,226],"operation":[172],"0.9-V":[174],"supply":[175,230],"202-MHz":[177],"rate,":[179],"resulting":[180],"energy":[183,200,213],"efficiency":[184,201,214],"1.53":[186],"4.12":[188],"pJ/bit/iteration.":[189,206],"clock-frequency":[191],"voltage":[193],"scaling,":[194],"1.1":[203],"3.1":[205],"highest":[211],"normalized":[212],"among":[215],"recently":[216],"published":[217],"CMOS-based":[218],"decoders":[219],"frequency":[228],"voltage.":[231]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":12},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2026-03-05T09:29:38.588285","created_date":"2025-10-10T00:00:00"}