{"id":"https://openalex.org/W2767804611","doi":"https://doi.org/10.1109/tvlsi.2017.2764520","title":"Mitigating BTI-Induced Degradation in STT-MRAM Sensing Schemes","display_name":"Mitigating BTI-Induced Degradation in STT-MRAM Sensing Schemes","publication_year":2017,"publication_date":"2017-11-10","ids":{"openalex":"https://openalex.org/W2767804611","doi":"https://doi.org/10.1109/tvlsi.2017.2764520","mag":"2767804611"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2764520","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2764520","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101864424","display_name":"Ing-Chao Lin","orcid":"https://orcid.org/0000-0003-1994-7512"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Ing-Chao Lin","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009277941","display_name":"Yun Kae Law","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yun Kae Law","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yuan Xie","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101864424"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":1.0034,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.78552047,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"26","issue":"1","first_page":"50","last_page":"62"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.7323221564292908},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.6497077941894531},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5082104206085205},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4882085621356964},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4863479733467102},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48533812165260315},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3310281038284302},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.3030533790588379},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2353818714618683},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1514815092086792}],"concepts":[{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.7323221564292908},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.6497077941894531},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5082104206085205},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4882085621356964},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4863479733467102},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48533812165260315},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3310281038284302},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.3030533790588379},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2353818714618683},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1514815092086792}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2017.2764520","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2764520","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-133360","is_oa":false,"landing_page_url":"http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=LinksAMR&SrcApp=PARTNER_APP&DestLinkType=FullRecord&DestApp=WOS&KeyUT=000419089200005","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4729626287","display_name":null,"funder_award_id":"MOST 105-2221-E-006-241","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G7968972034","display_name":null,"funder_award_id":"106-2221-E-006-027-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":51,"referenced_works":["https://openalex.org/W967987248","https://openalex.org/W1582724633","https://openalex.org/W1926315036","https://openalex.org/W1966935108","https://openalex.org/W1991821708","https://openalex.org/W1996356878","https://openalex.org/W1998416174","https://openalex.org/W1998654458","https://openalex.org/W2002022853","https://openalex.org/W2010202670","https://openalex.org/W2010216838","https://openalex.org/W2012923077","https://openalex.org/W2020404011","https://openalex.org/W2040228876","https://openalex.org/W2041505859","https://openalex.org/W2048592125","https://openalex.org/W2063061076","https://openalex.org/W2064216733","https://openalex.org/W2065778655","https://openalex.org/W2069368591","https://openalex.org/W2076372184","https://openalex.org/W2076406548","https://openalex.org/W2096259250","https://openalex.org/W2096867266","https://openalex.org/W2110134128","https://openalex.org/W2110276925","https://openalex.org/W2113115586","https://openalex.org/W2122757690","https://openalex.org/W2126357937","https://openalex.org/W2134633067","https://openalex.org/W2144154842","https://openalex.org/W2146245483","https://openalex.org/W2154451732","https://openalex.org/W2167021379","https://openalex.org/W2328430807","https://openalex.org/W2513752777","https://openalex.org/W2524859410","https://openalex.org/W2527326504","https://openalex.org/W2544896567","https://openalex.org/W2552594646","https://openalex.org/W3142248664","https://openalex.org/W3143577886","https://openalex.org/W3152241699","https://openalex.org/W4235106764","https://openalex.org/W4237860043","https://openalex.org/W4239813889","https://openalex.org/W4240146668","https://openalex.org/W4251123232","https://openalex.org/W6666891670","https://openalex.org/W6674323626","https://openalex.org/W6674416589"],"related_works":["https://openalex.org/W2002108625","https://openalex.org/W2375427054","https://openalex.org/W2163958441","https://openalex.org/W2170979950","https://openalex.org/W1998340208","https://openalex.org/W2544913214","https://openalex.org/W2076707939","https://openalex.org/W1900707063","https://openalex.org/W1576547964","https://openalex.org/W4206753316"],"abstract_inverted_index":{"Spin-transfer":[0],"torque":[1],"magnetic":[2,8],"RAM":[3],"(STT-MRAM),":[4],"which":[5],"uses":[6],"a":[7,16,46,70,113,142,263,268],"tunnel":[9],"junction":[10],"to":[11,121,150,292],"store":[12],"binary":[13],"data,":[14],"is":[15],"promising":[17],"memory":[18],"technology.":[19],"With":[20],"many":[21],"benefits,":[22],"such":[23],"as":[24,38],"low":[25,269],"leakage":[26],"power,":[27],"high":[28,30],"density,":[29],"endurance,":[31],"and":[32,116,164,171,186,193,209,216,230,244,251,267,285],"nonvolatility,":[33],"it":[34],"has":[35,68,76,92],"been":[36,93],"explored":[37],"an":[39,117,138],"SRAM":[40,86],"replacement":[41,48],"for":[42,49,95,161,183,206,241],"cache":[43],"design":[44],"or":[45],"DRAM":[47],"main":[50],"memory.":[51],"Meanwhile,":[52],"along":[53],"with":[54,141,176,234,273],"the":[55,62,78,81,85,96,104,152,155,177,199,228,235,238,259,274],"continuous":[56],"shrinking":[57],"of":[58,80,154,262],"CMOS":[59],"process":[60],"technology,":[61],"bias":[63,135],"temperature":[64],"instability":[65],"(BTI)":[66],"effect":[67,83,106],"become":[69],"major":[71],"reliability":[72],"issue.":[73],"Prior":[74],"work":[75],"investigated":[77],"influence":[79],"BTI":[82,105],"on":[84,107,137,174,196,219,254],"sense":[87,98,109,265,271,294],"amplifier,":[88],"but":[89],"no":[90],"investigation":[91],"done":[94,149],"STT-MRAM":[97,108],"amplifier.":[99],"Therefore,":[100],"this":[101],"paper":[102],"investigates":[103],"amplifiers.":[110,295],"We":[111,256],"propose":[112,131],"majority-based":[114,178,229],"technique":[115,120,284],"alternative":[118,200,231],"sensing":[119,128,159,181,201,204,232,239],"reduce":[122],"circuit":[123],"degradation.":[124],"To":[125],"further":[126],"improve":[127],"delay,":[129],"we":[130],"using":[132,198,222,227],"forward":[133],"body":[134],"(FBB)":[136],"access":[139],"transistor":[140],"positive":[143],"voltage.":[144],"Extensive":[145],"simulation":[146,278,286],"results":[147,279],"are":[148],"show":[151,280],"effectiveness":[153],"proposed":[156,275,283],"techniques.":[157,276],"The":[158,180,203,277],"delay":[160,182,205,240],"reading":[162,184,207,242],"zeros":[163,185,208,243],"ones":[165,187,210,245],"can":[166,188,211,246,288],"be":[167,189,212,247,289],"reduced":[168,190,213],"by":[169,191,214,221,249],"10.61%":[170],"4.35%,":[172],"respectively,":[173,195,218,253],"average,":[175,197,220],"technique.":[179,202],"4.42%":[192],"1.83%,":[194],"15.37%":[215],"6.25%,":[217],"both":[223],"techniques":[224,233],"simultaneously.":[225],"When":[226],"FBB":[236],"technique,":[237],"improved":[248],"29.93%":[250],"57.67%,":[252],"average.":[255],"also":[257],"analyze":[258],"BTI-induced":[260],"degradation":[261],"high-performance":[264],"amplifier":[266,272],"power":[270],"that":[281],"our":[282],"flow":[287],"easily":[290],"extended":[291],"other":[293]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
