{"id":"https://openalex.org/W2765708221","doi":"https://doi.org/10.1109/tvlsi.2017.2761554","title":"A High-Level Design Framework for the Automatic Generation of High-Throughput Systolic Binomial-Tree Solvers","display_name":"A High-Level Design Framework for the Automatic Generation of High-Throughput Systolic Binomial-Tree Solvers","publication_year":2017,"publication_date":"2017-10-24","ids":{"openalex":"https://openalex.org/W2765708221","doi":"https://doi.org/10.1109/tvlsi.2017.2761554","mag":"2765708221"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2761554","is_oa":false,"landing_page_url":"http://doi.org/10.1109/tvlsi.2017.2761554","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046516901","display_name":"Aryan Tavakkoli","orcid":"https://orcid.org/0000-0003-0166-2949"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Aryan Tavakkoli","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0003-0166-2949","affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5081452934","display_name":"David B. Thomas","orcid":"https://orcid.org/0000-0002-9671-0917"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"David B. Thomas","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4583,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.67060629,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"26","issue":"2","first_page":"341","last_page":"354"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9884999990463257,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6157423853874207},{"id":"https://openalex.org/keywords/binomial","display_name":"Binomial (polynomial)","score":0.6120760440826416},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.598815381526947},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5480098128318787},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.5401076674461365},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.49183154106140137},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3866897225379944},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24985957145690918},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.19295361638069153},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.18553325533866882},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15603014826774597},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09359779953956604},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.07812324166297913}],"concepts":[{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6157423853874207},{"id":"https://openalex.org/C2781315470","wikidata":"https://www.wikidata.org/wiki/Q193623","display_name":"Binomial (polynomial)","level":2,"score":0.6120760440826416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.598815381526947},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5480098128318787},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.5401076674461365},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.49183154106140137},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3866897225379944},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24985957145690918},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.19295361638069153},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.18553325533866882},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15603014826774597},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09359779953956604},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.07812324166297913},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tvlsi.2017.2761554","is_oa":false,"landing_page_url":"http://doi.org/10.1109/tvlsi.2017.2761554","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:eprints.soton.ac.uk:453672","is_oa":false,"landing_page_url":"https://eprints.soton.ac.uk/453672/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401019","display_name":"ePrints Soton (University of Southampton)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I43439940","host_organization_name":"University of Southampton","host_organization_lineage":["https://openalex.org/I43439940"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"},{"id":"pmh:oai:spiral.imperial.ac.uk:10044/1/55168","is_oa":false,"landing_page_url":"http://hdl.handle.net/10044/1/55168","pdf_url":null,"source":{"id":"https://openalex.org/S4306401396","display_name":"Spiral (Imperial College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I47508984","host_organization_name":"Imperial College London","host_organization_lineage":["https://openalex.org/I47508984"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"354","raw_type":"Journal Article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5199999809265137,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1530688151","https://openalex.org/W1557238565","https://openalex.org/W1600624394","https://openalex.org/W1963688037","https://openalex.org/W2019462857","https://openalex.org/W2030898836","https://openalex.org/W2094316810","https://openalex.org/W2100342895","https://openalex.org/W2102526332","https://openalex.org/W2111517919","https://openalex.org/W2146612430","https://openalex.org/W2147065211","https://openalex.org/W2149239582","https://openalex.org/W2164564117","https://openalex.org/W2171927842","https://openalex.org/W2588085267","https://openalex.org/W3122388676","https://openalex.org/W4234381228","https://openalex.org/W6664035182"],"related_works":["https://openalex.org/W2117014006","https://openalex.org/W4233815414","https://openalex.org/W2372170743","https://openalex.org/W1558545464","https://openalex.org/W2074301136","https://openalex.org/W1984303163","https://openalex.org/W1509211761","https://openalex.org/W2358725432","https://openalex.org/W3047022145","https://openalex.org/W2047588290"],"abstract_inverted_index":{"<p>The":[0],"binomial-tree":[1,68],"model":[2],"is":[3,16],"a":[4,12,46,58,64,72,87,123,129,148,181],"numerical":[5],"method":[6],"widely":[7],"used":[8],"in":[9,115,159],"finance":[10],"with":[11,18,36,100,147,165,180,192],"computational":[13],"complexity":[14],"which":[15,92],"quadratic":[17],"respect":[19,193],"to":[20,31,137,161,187,194],"the":[21,78,155,162],"solution":[22],"accuracy.":[23],"The":[24],"existing":[25,163],"research":[26],"has":[27],"employed":[28],"reconfigurable":[29,112],"computing":[30],"provide":[32],"faster":[33],"solutions":[34,114,164],"compared":[35,179],"general-purpose":[37],"processors,":[38],"but":[39],"they":[40],"require":[41,134],"low-level":[42],"manual":[43],"design":[44,90],"by":[45],"hardware":[47,113],"engineer,":[48],"and":[49,70,104,107,158,189,196],"can":[50],"only":[51],"solve":[52,138],"American":[53,143],"options.":[54],"This":[55,83,174],"paper":[56,84],"presents":[57,86],"formal":[59],"mathematical":[60],"framework":[61,79],"that":[62,76],"captures":[63],"large":[65],"class":[66],"of":[67,97,151],"problems,":[69],"provides":[71],"systolic":[73,185],"data-movement":[74],"template":[75],"maps":[77],"into":[80],"digital":[81],"hardware.":[82],"also":[85],"fully":[88,110],"automated":[89],"flow,":[91],"takes":[93],"C-level":[94],"user":[95],"descriptions":[96],"binomial":[98,145],"trees,":[99,146],"custom":[101],"data":[102],"types":[103],"tree":[105],"operations,":[106],"automatically":[108],"generates":[109],"pipelined":[111],"field-programmable":[116],"gate":[117],"array":[118],"(FPGA)":[119],"bit-stream":[120],"files.":[121],"On":[122],"Xilinx":[124],"Virtex-7":[125],"xc7vx980t":[126],"FPGA":[127,167],"at":[128],"100-MHz":[130],"clock":[131],"frequency,":[132],"we":[133,169],"54-\u00b5s":[135],"latency":[136],"three":[139],"876-step":[140],"32-bit":[141],"fixed-point":[142],"option":[144],"pricing":[149],"rate":[150],"114k":[152],"trees/s.":[153],"From":[154],"same":[156],"device":[157],"comparison":[160],"equivalent":[166],"technology,":[168],"always":[170],"achieve":[171],"better":[172],"throughput.":[173],"ranges":[175],"from":[176],"1.4\u00d7":[177],"throughput":[178],"hand-tuned":[182],"register-transfer":[183],"level":[184],"design,":[186],"9.1\u00d7":[188],"5.6\u00d7":[190],"improvement":[191],"scalar":[195],"vector":[197],"architectures,":[198],"respectively.</p>":[199]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}