{"id":"https://openalex.org/W2769287520","doi":"https://doi.org/10.1109/tvlsi.2017.2759219","title":"ElasticCore: A Dynamic Heterogeneous Platform With Joint Core and Voltage/Frequency Scaling","display_name":"ElasticCore: A Dynamic Heterogeneous Platform With Joint Core and Voltage/Frequency Scaling","publication_year":2017,"publication_date":"2017-11-16","ids":{"openalex":"https://openalex.org/W2769287520","doi":"https://doi.org/10.1109/tvlsi.2017.2759219","mag":"2769287520"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2759219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2759219","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034212925","display_name":"Mohammad Khavari Tavana","orcid":"https://orcid.org/0000-0002-2038-4908"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]},{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Khavari Tavana","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","George Mason University, Fairfax, VA, USA"],"raw_orcid":"https://orcid.org/0000-0002-2038-4908","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031394992","display_name":"Mohammad Hossein Hajkazemi","orcid":null},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]},{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Hossein Hajkazemi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","George Mason University, Fairfax, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071724792","display_name":"Divya Pathak","orcid":"https://orcid.org/0000-0001-8887-6645"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Divya Pathak","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA"],"raw_orcid":"https://orcid.org/0000-0001-8887-6645","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059641297","display_name":"Ioannis Savidis","orcid":"https://orcid.org/0000-0003-4230-1795"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ioannis Savidis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA"],"raw_orcid":"https://orcid.org/0000-0003-4230-1795","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017865799","display_name":"Houman Homayoun","orcid":"https://orcid.org/0000-0003-4052-1663"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Houman Homayoun","raw_affiliation_strings":["Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4474,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.63421971,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"26","issue":"2","first_page":"249","last_page":"261"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12776","display_name":"Electrohydrodynamics and Fluid Dynamics","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9699000120162964,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.674720823764801},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.602383017539978},{"id":"https://openalex.org/keywords/joint","display_name":"Joint (building)","score":0.597008466720581},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5340306758880615},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5321998000144958},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.41385743021965027},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.412794828414917},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4062947928905487},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3251684904098511},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28423595428466797},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19431567192077637},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1859833002090454},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12750953435897827}],"concepts":[{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.674720823764801},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.602383017539978},{"id":"https://openalex.org/C18555067","wikidata":"https://www.wikidata.org/wiki/Q8375051","display_name":"Joint (building)","level":2,"score":0.597008466720581},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5340306758880615},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5321998000144958},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.41385743021965027},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.412794828414917},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4062947928905487},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3251684904098511},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28423595428466797},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19431567192077637},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1859833002090454},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12750953435897827},{"id":"https://openalex.org/C170154142","wikidata":"https://www.wikidata.org/wiki/Q150737","display_name":"Architectural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2017.2759219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2759219","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[{"id":"https://openalex.org/G1649052438","display_name":null,"funder_award_id":"CNS 1526913","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W1966668827","https://openalex.org/W1980242590","https://openalex.org/W1990884219","https://openalex.org/W1998285920","https://openalex.org/W2006312753","https://openalex.org/W2009470771","https://openalex.org/W2013281054","https://openalex.org/W2021324492","https://openalex.org/W2039936456","https://openalex.org/W2042583824","https://openalex.org/W2052706880","https://openalex.org/W2053920414","https://openalex.org/W2059385825","https://openalex.org/W2067354926","https://openalex.org/W2096904991","https://openalex.org/W2112085716","https://openalex.org/W2116175063","https://openalex.org/W2121297016","https://openalex.org/W2122438621","https://openalex.org/W2124426020","https://openalex.org/W2130261923","https://openalex.org/W2131081741","https://openalex.org/W2133170190","https://openalex.org/W2136455256","https://openalex.org/W2138783391","https://openalex.org/W2159401492","https://openalex.org/W2162123103","https://openalex.org/W2167556016","https://openalex.org/W2170382128","https://openalex.org/W2212581622","https://openalex.org/W2218701546","https://openalex.org/W2259879138","https://openalex.org/W2293879769","https://openalex.org/W3004856113","https://openalex.org/W3137536588","https://openalex.org/W4237580674","https://openalex.org/W4237877708","https://openalex.org/W4239677523","https://openalex.org/W4244536239","https://openalex.org/W4250692521","https://openalex.org/W4255432895","https://openalex.org/W4255812374","https://openalex.org/W6677377052","https://openalex.org/W6683690128"],"related_works":["https://openalex.org/W1967088250","https://openalex.org/W2054730497","https://openalex.org/W2161125731","https://openalex.org/W2154351074","https://openalex.org/W2151223307","https://openalex.org/W2023400509","https://openalex.org/W2332054630","https://openalex.org/W2590100594","https://openalex.org/W2154169726","https://openalex.org/W2898122376"],"abstract_inverted_index":{"Heterogeneous":[0],"architectures":[1,48],"have":[2],"emerged":[3],"as":[4,41,43,174],"a":[5,28,156],"promising":[6],"solution":[7],"to":[8,76,95,110,138,170,176],"address":[9,55],"the":[10,24,37,51,68,78,97,100,105,112,117,122,180],"dark":[11],"silicon":[12],"challenge":[13,30],"by":[14],"providing":[15],"customized":[16],"cores":[17],"for":[18,46,88],"each":[19],"running":[20],"application.":[21],"To":[22,54],"harness":[23],"power":[25,89,151,182],"of":[26,99,121],"heterogeneity,":[27],"critical":[29],"is":[31,61,93],"simultaneously":[32],"fine-tuning":[33],"several":[34],"parameters":[35],"at":[36,81,159],"application,":[38],"architecture,":[39],"system,":[40],"well":[42],"circuit":[44],"levels":[45],"heterogeneous":[47],"that":[49,135,147],"improve":[50,111],"energy-efficiency":[52],"envelope.":[53],"this":[56],"challenge,":[57],"an":[58,177],"ElasticCore":[59,123,148],"platform":[60],"described":[62],"where":[63],"core":[64,101],"resources":[65],"along":[66,103],"with":[67,104,126,131,155,179],"operating":[69,106],"voltage":[70,107,129],"and":[71,90,108,152,165,183],"frequency":[72],"settings":[73],"are":[74,124,136],"scaled":[75],"match":[77],"application":[79,150],"behavior":[80,154],"run-time.":[82],"A":[83],"quantile":[84],"linear":[85],"regression":[86],"model":[87],"performance":[91,153,184],"prediction":[92],"used":[94],"guide":[96],"adaptation":[98],"resources,":[102],"frequency,":[109],"energy":[113,172],"efficiency.":[114],"In":[115],"addition,":[116],"dynamically":[118],"scalable":[119],"partitions":[120],"powered":[125],"multiple":[127],"on-chip":[128],"regulators":[130],"high-power":[132],"conversion":[133],"efficiency":[134],"able":[137],"realize":[139],"fast":[140],"dynamic":[141],"voltage/frequency":[142],"scaling.":[143],"The":[144],"results":[145],"indicate":[146],"predicts":[149],"small":[157],"error":[158],"run-time":[160],"across":[161],"all":[162],"studied":[163],"benchmarks":[164],"achieves,":[166],"on":[167],"average":[168],"close":[169],"93%":[171],"efficiency,":[173],"compared":[175],"architecture":[178],"Oracle":[181],"predictor.":[185]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
