{"id":"https://openalex.org/W2763753390","doi":"https://doi.org/10.1109/tvlsi.2017.2754442","title":"An Ultralow Power Subthreshold CMOS Voltage Reference Without Requiring Resistors or BJTs","display_name":"An Ultralow Power Subthreshold CMOS Voltage Reference Without Requiring Resistors or BJTs","publication_year":2017,"publication_date":"2017-10-02","ids":{"openalex":"https://openalex.org/W2763753390","doi":"https://doi.org/10.1109/tvlsi.2017.2754442","mag":"2763753390"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2754442","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2754442","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100356119","display_name":"Yang Liu","orcid":"https://orcid.org/0000-0003-2252-3665"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yang Liu","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0003-2252-3665","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029241233","display_name":"Chenchang Zhan","orcid":"https://orcid.org/0000-0002-4878-4655"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chenchang Zhan","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101846204","display_name":"Lidan Wang","orcid":"https://orcid.org/0000-0002-3660-1524"},"institutions":[{"id":"https://openalex.org/I205237279","display_name":"Nankai University","ror":"https://ror.org/01y1kjr75","country_code":"CN","type":"education","lineage":["https://openalex.org/I205237279"]},{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lidan Wang","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, SUSTech, Shenzhen, China","College of Electronic Information and Optical Engineering, Nankai University, Tianjin, China"],"raw_orcid":"https://orcid.org/0000-0002-3660-1524","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, SUSTech, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]},{"raw_affiliation_string":"College of Electronic Information and Optical Engineering, Nankai University, Tianjin, China","institution_ids":["https://openalex.org/I205237279"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":3.1976,"has_fulltext":false,"cited_by_count":62,"citation_normalized_percentile":{"value":0.92451139,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"26","issue":"1","first_page":"201","last_page":"205"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.9230443239212036},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.7765296101570129},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.7273439764976501},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7195066213607788},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.6837507486343384},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6719878911972046},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5804739594459534},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.5504806637763977},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.5156768560409546},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4750426113605499},{"id":"https://openalex.org/keywords/diode","display_name":"Diode","score":0.4710053503513336},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.46089357137680054},{"id":"https://openalex.org/keywords/power-semiconductor-device","display_name":"Power semiconductor device","score":0.4554644525051117},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22559234499931335}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.9230443239212036},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.7765296101570129},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.7273439764976501},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7195066213607788},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.6837507486343384},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6719878911972046},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5804739594459534},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.5504806637763977},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.5156768560409546},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4750426113605499},{"id":"https://openalex.org/C78434282","wikidata":"https://www.wikidata.org/wiki/Q11656","display_name":"Diode","level":2,"score":0.4710053503513336},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.46089357137680054},{"id":"https://openalex.org/C129014197","wikidata":"https://www.wikidata.org/wiki/Q906544","display_name":"Power semiconductor device","level":3,"score":0.4554644525051117},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22559234499931335}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2017.2754442","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2754442","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[{"id":"https://openalex.org/G5709494180","display_name":null,"funder_award_id":"61604067","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G659760193","display_name":null,"funder_award_id":"JCYJ20160530191008447","funder_id":"https://openalex.org/F4320326705","funder_display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality"},{"id":"https://openalex.org/G6639118467","display_name":null,"funder_award_id":"JCYJ20160429191518358","funder_id":"https://openalex.org/F4320326705","funder_display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320326705","display_name":"Science, Technology and Innovation Commission of Shenzhen Municipality","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1992889283","https://openalex.org/W2016590650","https://openalex.org/W2024963751","https://openalex.org/W2047344047","https://openalex.org/W2100518195","https://openalex.org/W2146031070","https://openalex.org/W2146324717","https://openalex.org/W2307829466","https://openalex.org/W2509281929","https://openalex.org/W2510156037","https://openalex.org/W2527089532","https://openalex.org/W2531094437","https://openalex.org/W2558013876","https://openalex.org/W2577158237","https://openalex.org/W2584442328","https://openalex.org/W3086923348"],"related_works":["https://openalex.org/W1793154485","https://openalex.org/W2918058197","https://openalex.org/W2521656715","https://openalex.org/W2009852498","https://openalex.org/W1991521745","https://openalex.org/W3004587385","https://openalex.org/W4220771873","https://openalex.org/W2786811717","https://openalex.org/W2109147260","https://openalex.org/W2101797444"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,32,91,107],"novel":[4],"ultralow":[5],"power":[6,14,125],"CMOS":[7,94],"voltage":[8,23,53,112],"reference":[9,111],"(CVR)":[10],"with":[11,113],"only":[12,128,139],"4.6-nW":[13],"consumption.":[15,83],"In":[16],"the":[17,21,28,51,58,100,123,135],"proposed":[18,85],"CVR":[19,86],"circuit,":[20],"proportional-to-absolute-temperature":[22],"is":[24,54,88,103,127,138],"generated":[25],"by":[26,56],"feeding":[27],"leakage":[29],"current":[30],"of":[31,44,61,105],"zero-Vgs":[33],"nMOS":[34,39,63],"transistor":[35],"to":[36,79,119],"two":[37],"diode-connected":[38],"transistors":[40],"in":[41,47,90],"series,":[42],"both":[43],"which":[45],"are":[46],"subthreshold":[48],"region;":[49],"while":[50],"complementary-to-absolute-temperature":[52],"created":[55],"using":[57],"body":[59],"diodes":[60],"another":[62],"transistor.":[64],"Consequently,":[65],"low-power":[66],"operation":[67],"can":[68],"be":[69],"achieved":[70],"without":[71],"requiring":[72],"resistors":[73],"or":[74],"bipolar":[75],"junction":[76],"transistors,":[77],"leading":[78],"small":[80],"chip":[81],"area":[82,137],"The":[84],"circuit":[87],"fabricated":[89],"standard":[92],"0.18-\u03bcm":[93],"process.":[95],"Measurement":[96],"results":[97],"show":[98],"that":[99],"prototype":[101],"design":[102],"capable":[104],"providing":[106],"755":[108],"mV":[109],"typical":[110,124],"34":[114],"ppm/\u00b0C":[115],"from":[116],"-15":[117],"\u00b0C":[118],"140":[120],"\u00b0C.":[121],"Moreover,":[122],"consumption":[126],"4.6":[129],"nW":[130],"at":[131],"room":[132],"temperature":[133],"and":[134],"active":[136],"0.0598":[140],"mm2.":[141]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":15},{"year":2017,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
