{"id":"https://openalex.org/W2963824032","doi":"https://doi.org/10.1109/tvlsi.2017.2754192","title":"Efficient Analog Circuits for Boolean Satisfiability","display_name":"Efficient Analog Circuits for Boolean Satisfiability","publication_year":2017,"publication_date":"2017-10-06","ids":{"openalex":"https://openalex.org/W2963824032","doi":"https://doi.org/10.1109/tvlsi.2017.2754192","mag":"2963824032"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2754192","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2754192","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071383109","display_name":"Xunzhao Yin","orcid":"https://orcid.org/0000-0003-4656-9545"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xunzhao Yin","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058897428","display_name":"Behnam Sedighi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]},{"id":"https://openalex.org/I4210111675","display_name":"Market Matters","ror":"https://ror.org/021yan307","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I4210111675"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Behnam Sedighi","raw_affiliation_strings":["Qualcomm Inc., San Diego, CA, USA"],"affiliations":[{"raw_affiliation_string":"Qualcomm Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596","https://openalex.org/I4210111675"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091158372","display_name":"Melinda Varga","orcid":null},"institutions":[{"id":"https://openalex.org/I118746106","display_name":"College of Wooster","ror":"https://ror.org/029zqs055","country_code":"US","type":"education","lineage":["https://openalex.org/I118746106"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Melinda Varga","raw_affiliation_strings":["Biochemistry and Molecular Biology Program, The College of Wooster, Wooster, OH, USA"],"affiliations":[{"raw_affiliation_string":"Biochemistry and Molecular Biology Program, The College of Wooster, Wooster, OH, USA","institution_ids":["https://openalex.org/I118746106"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038398506","display_name":"M\u00e1ria Ercsey-Ravasz","orcid":"https://orcid.org/0000-0003-4428-9953"},"institutions":[{"id":"https://openalex.org/I3125347698","display_name":"Babe\u0219-Bolyai University","ror":"https://ror.org/02rmd1t30","country_code":"RO","type":"education","lineage":["https://openalex.org/I3125347698"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Maria Ercsey-Ravasz","raw_affiliation_strings":["Faculty of Physics, Hungarian Physics Institute, Babes-Bolyai University, Cluj-Napoca, Romania"],"affiliations":[{"raw_affiliation_string":"Faculty of Physics, Hungarian Physics Institute, Babes-Bolyai University, Cluj-Napoca, Romania","institution_ids":["https://openalex.org/I3125347698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091671977","display_name":"Zolt\u00e1n Toroczkai","orcid":"https://orcid.org/0000-0002-6602-2849"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zoltan Toroczkai","raw_affiliation_strings":["Department of Physics and the Interdisciplinary Center for Network Science and Applications, University of Notre Dame, Notre Dame, IN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Physics and the Interdisciplinary Center for Network Science and Applications, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100600905","display_name":"Xiaobo Sharon Hu","orcid":"https://orcid.org/0000-0002-6636-9738"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaobo Sharon Hu","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Notre Dame, Notre Dame, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5071383109"],"corresponding_institution_ids":["https://openalex.org/I107639228"],"apc_list":null,"apc_paid":null,"fwci":2.1904,"has_fulltext":false,"cited_by_count":36,"citation_normalized_percentile":{"value":0.88894205,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"26","issue":"1","first_page":"155","last_page":"167"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/boolean-satisfiability-problem","display_name":"Boolean satisfiability problem","score":0.8054604530334473},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6707895994186401},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.538512110710144},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5269097685813904},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5128138661384583},{"id":"https://openalex.org/keywords/circuit-complexity","display_name":"Circuit complexity","score":0.48954614996910095},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4863472580909729},{"id":"https://openalex.org/keywords/boolean-circuit","display_name":"Boolean circuit","score":0.44534650444984436},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.4245133399963379},{"id":"https://openalex.org/keywords/true-quantified-boolean-formula","display_name":"True quantified Boolean formula","score":0.4222545325756073},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.42126697301864624},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4195847809314728},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3839521110057831},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34380438923835754},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3037927448749542},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11761662364006042}],"concepts":[{"id":"https://openalex.org/C6943359","wikidata":"https://www.wikidata.org/wiki/Q875276","display_name":"Boolean satisfiability problem","level":2,"score":0.8054604530334473},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6707895994186401},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.538512110710144},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5269097685813904},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5128138661384583},{"id":"https://openalex.org/C90702460","wikidata":"https://www.wikidata.org/wiki/Q1055112","display_name":"Circuit complexity","level":3,"score":0.48954614996910095},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4863472580909729},{"id":"https://openalex.org/C141796577","wikidata":"https://www.wikidata.org/wiki/Q837479","display_name":"Boolean circuit","level":3,"score":0.44534650444984436},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.4245133399963379},{"id":"https://openalex.org/C200415742","wikidata":"https://www.wikidata.org/wiki/Q1350285","display_name":"True quantified Boolean formula","level":2,"score":0.4222545325756073},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.42126697301864624},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4195847809314728},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3839521110057831},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34380438923835754},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3037927448749542},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11761662364006042},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2017.2754192","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2754192","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W291502169","https://openalex.org/W1017499121","https://openalex.org/W1496937667","https://openalex.org/W1518705996","https://openalex.org/W1711753553","https://openalex.org/W1966863253","https://openalex.org/W1977850862","https://openalex.org/W1993546274","https://openalex.org/W1999453928","https://openalex.org/W2014307680","https://openalex.org/W2017127020","https://openalex.org/W2024770982","https://openalex.org/W2030586674","https://openalex.org/W2030910540","https://openalex.org/W2042249109","https://openalex.org/W2048051309","https://openalex.org/W2050918004","https://openalex.org/W2053429109","https://openalex.org/W2057137378","https://openalex.org/W2057361103","https://openalex.org/W2081431552","https://openalex.org/W2094971942","https://openalex.org/W2096307462","https://openalex.org/W2103406716","https://openalex.org/W2136318306","https://openalex.org/W2138913040","https://openalex.org/W2142785340","https://openalex.org/W2152133888","https://openalex.org/W2156223756","https://openalex.org/W2157926305","https://openalex.org/W2159009939","https://openalex.org/W2160121923","https://openalex.org/W2165661129","https://openalex.org/W2166250385","https://openalex.org/W2254450385","https://openalex.org/W2516501730","https://openalex.org/W3197275572","https://openalex.org/W4229840182","https://openalex.org/W4237740194","https://openalex.org/W4243832265","https://openalex.org/W4251625379","https://openalex.org/W6674427772"],"related_works":["https://openalex.org/W35365073","https://openalex.org/W2586688167","https://openalex.org/W2148332793","https://openalex.org/W2165747555","https://openalex.org/W2235115558","https://openalex.org/W4241989857","https://openalex.org/W1745650241","https://openalex.org/W13716531","https://openalex.org/W2078076811","https://openalex.org/W4388562138"],"abstract_inverted_index":{"Efficient":[0],"solutions":[1,33,236],"to":[2,34,48,106,149,244],"nonpolynomial":[3],"(NP)-complete":[4],"problems":[5,15,225],"would":[6],"significantly":[7],"benefit":[8],"both":[9],"science":[10],"and":[11,112,170,179,231],"industry.":[12],"However,":[13],"such":[14,36],"are":[16,131,237],"intractable":[17],"on":[18,22,63,136,182,204,217],"digital":[19,137,218],"computers":[20],"based":[21,181],"the":[23,29,65,94,155,158,163,166,171,206],"von":[24],"Neumann":[25],"architecture,":[26],"thus":[27],"creating":[28],"need":[30],"for":[31,115,124,133,223],"alternative":[32],"tackle":[35],"problems.":[37],"Recently,":[38],"a":[39,50,86,110,183,213,241,245],"deterministic,":[40],"continuous-time":[41],"dynamical":[42],"system":[43],"(CTDS)":[44],"was":[45],"proposed":[46],"[1]":[47],"solve":[49,150],"representative":[51],"NP-complete":[52],"problem,":[53],"Boolean":[54],"Satisfiability":[55],"(SAT).":[56],"This":[57,83],"solver":[58,216],"shows":[59],"polynomial":[60],"analog":[61,88,99],"time-complexity":[62],"even":[64,205],"hardest":[66,207],"benchmark":[67],"k-SAT":[68,127],"(k":[69],"\u2265":[70],"3)":[71],"formulas,":[72],"but":[73],"at":[74],"an":[75,221],"energy":[76],"cost":[77],"through":[78],"exponentially":[79],"driven":[80],"auxiliary":[81],"variables.":[82],"paper":[84],"presents":[85],"novel":[87],"hardware":[89],"SAT":[90,215],"solver,":[91],"AC-SAT,":[92],"implementing":[93],"CTDS":[95],"via":[96],"incorporating":[97],"novel,":[98],"circuit":[100,159,176],"design":[101],"ideas.":[102],"AC-SAT":[103,144],"is":[104,113,121,177],"intended":[105],"be":[107,147],"used":[108],"as":[109],"coprocessor":[111],"programmable":[114],"handling":[116],"different":[117],"problem":[118,128],"specifications.":[119],"It":[120],"especially":[122],"effective":[123],"solving":[125],"hard":[126,224],"instances":[129],"that":[130],"challenging":[132],"algorithms":[134],"running":[135],"machines.":[138],"Furthermore,":[139],"with":[140,162,189,212,226],"its":[141],"modular":[142],"design,":[143],"can":[145],"readily":[146],"extended":[148],"larger":[151],"size":[152,156],"problems,":[153,209],"while":[154],"of":[157,165,168,173,199],"grows":[160],"linearly":[161],"product":[164],"number":[167,172],"variables":[169,230],"clauses.":[174],"The":[175],"designed":[178],"simulated":[180],"32-nm":[184],"CMOS":[185],"technology.":[186],"Simulation":[187],"Program":[188],"Integrated":[190],"Circuit":[191],"Emphasis":[192],"(SPICE)":[193],"simulation":[194],"results":[195],"show":[196],"speedup":[197],"factors":[198],"~10":[200],"<sup":[201],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[202],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">4</sup>":[203],"3-SAT":[208],"when":[210],"compared":[211],"state-of-the-art":[214],"computers.":[219],"As":[220],"example,":[222],"N":[227],"=":[228,233],"50":[229],"M":[232],"212":[234],"clauses,":[235],"found":[238],"within":[239],"from":[240],"few":[242,246],"nanoseconds":[243],"hundred":[247],"nanoseconds.":[248]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}