{"id":"https://openalex.org/W2763108990","doi":"https://doi.org/10.1109/tvlsi.2017.2752963","title":"Dynamic Choke Sensing for Timing Error Resilience in NTC Systems","display_name":"Dynamic Choke Sensing for Timing Error Resilience in NTC Systems","publication_year":2017,"publication_date":"2017-10-02","ids":{"openalex":"https://openalex.org/W2763108990","doi":"https://doi.org/10.1109/tvlsi.2017.2752963","mag":"2763108990"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2752963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2752963","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047332825","display_name":"Aatreyi Bal","orcid":"https://orcid.org/0000-0002-0649-1766"},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Aatreyi Bal","raw_affiliation_strings":["USU BRIDGE Lab, Utah State University, Logan, UT, USA"],"affiliations":[{"raw_affiliation_string":"USU BRIDGE Lab, Utah State University, Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012147852","display_name":"Shamik Saha","orcid":null},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shamik Saha","raw_affiliation_strings":["USU BRIDGE Lab, Utah State University, Logan, UT, USA"],"affiliations":[{"raw_affiliation_string":"USU BRIDGE Lab, Utah State University, Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068885938","display_name":"Sanghamitra Roy","orcid":"https://orcid.org/0000-0002-3927-1612"},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanghamitra Roy","raw_affiliation_strings":["USU BRIDGE Lab, Utah State University, Logan, UT, USA"],"affiliations":[{"raw_affiliation_string":"USU BRIDGE Lab, Utah State University, Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101594477","display_name":"Koushik Chakraborty","orcid":"https://orcid.org/0000-0003-0228-2737"},"institutions":[{"id":"https://openalex.org/I121980950","display_name":"Utah State University","ror":"https://ror.org/00h6set76","country_code":"US","type":"education","lineage":["https://openalex.org/I121980950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Koushik Chakraborty","raw_affiliation_strings":["USU BRIDGE Lab, Utah State University, Logan, UT, USA"],"affiliations":[{"raw_affiliation_string":"USU BRIDGE Lab, Utah State University, Logan, UT, USA","institution_ids":["https://openalex.org/I121980950"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5047332825"],"corresponding_institution_ids":["https://openalex.org/I121980950"],"apc_list":null,"apc_paid":null,"fwci":1.0195,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.78724408,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"26","issue":"1","first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/choke","display_name":"Choke","score":0.948100209236145},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6127055287361145},{"id":"https://openalex.org/keywords/resilience","display_name":"Resilience (materials science)","score":0.6088927388191223},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5211053490638733},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4872781038284302},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4784308075904846},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47455698251724243},{"id":"https://openalex.org/keywords/discriminator","display_name":"Discriminator","score":0.4476713240146637},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4454013705253601},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.44341331720352173},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4423433542251587},{"id":"https://openalex.org/keywords/opcode","display_name":"Opcode","score":0.44065213203430176},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.427192747592926},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.394033819437027},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.36751455068588257},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29115068912506104},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2808361053466797},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2539641857147217},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24647009372711182},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18654587864875793},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14566564559936523},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12112990021705627},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.1103857159614563}],"concepts":[{"id":"https://openalex.org/C29049376","wikidata":"https://www.wikidata.org/wiki/Q864746","display_name":"Choke","level":2,"score":0.948100209236145},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6127055287361145},{"id":"https://openalex.org/C2779585090","wikidata":"https://www.wikidata.org/wiki/Q3457762","display_name":"Resilience (materials science)","level":2,"score":0.6088927388191223},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5211053490638733},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4872781038284302},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4784308075904846},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47455698251724243},{"id":"https://openalex.org/C2779803651","wikidata":"https://www.wikidata.org/wiki/Q5282088","display_name":"Discriminator","level":3,"score":0.4476713240146637},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4454013705253601},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.44341331720352173},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4423433542251587},{"id":"https://openalex.org/C52173422","wikidata":"https://www.wikidata.org/wiki/Q766483","display_name":"Opcode","level":2,"score":0.44065213203430176},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.427192747592926},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.394033819437027},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.36751455068588257},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29115068912506104},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2808361053466797},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2539641857147217},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24647009372711182},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18654587864875793},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14566564559936523},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12112990021705627},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.1103857159614563},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2017.2752963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2752963","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:digitalcommons.usu.edu:ece_facpub-1281","is_oa":false,"landing_page_url":"https://digitalcommons.usu.edu/ece_facpub/277","pdf_url":null,"source":{"id":"https://openalex.org/S4377196327","display_name":"Digital Commons - USU (Utah State University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I121980950","host_organization_name":"Utah State University","host_organization_lineage":["https://openalex.org/I121980950"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical and Computer Engineering Faculty Publications","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G2226162150","display_name":null,"funder_award_id":"CNS-1421022","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G2980899272","display_name":null,"funder_award_id":"CNS-1421068","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G4410011735","display_name":null,"funder_award_id":"CAREER-1253024","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5523648604","display_name":null,"funder_award_id":"CCF-1318826","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1989517435","https://openalex.org/W1998525920","https://openalex.org/W1999684621","https://openalex.org/W2009523258","https://openalex.org/W2010635096","https://openalex.org/W2013978035","https://openalex.org/W2032116786","https://openalex.org/W2050315555","https://openalex.org/W2059774354","https://openalex.org/W2074044013","https://openalex.org/W2081624924","https://openalex.org/W2082597509","https://openalex.org/W2085503707","https://openalex.org/W2103670614","https://openalex.org/W2104677471","https://openalex.org/W2120116751","https://openalex.org/W2123845384","https://openalex.org/W2128247882","https://openalex.org/W2133041543","https://openalex.org/W2135407913","https://openalex.org/W2150283124","https://openalex.org/W2166964417","https://openalex.org/W2168159483","https://openalex.org/W2168881792","https://openalex.org/W2345447838","https://openalex.org/W2534150268","https://openalex.org/W3144433480","https://openalex.org/W3148981577","https://openalex.org/W4229806106","https://openalex.org/W4234941233","https://openalex.org/W4236432903","https://openalex.org/W4254147461","https://openalex.org/W4254506919","https://openalex.org/W4285719527","https://openalex.org/W6655320552","https://openalex.org/W6658522862","https://openalex.org/W6680107091"],"related_works":["https://openalex.org/W2354295004","https://openalex.org/W2004101185","https://openalex.org/W1973546292","https://openalex.org/W2612941909","https://openalex.org/W2349594491","https://openalex.org/W2763108990","https://openalex.org/W2035744377","https://openalex.org/W2613369427","https://openalex.org/W3142246905","https://openalex.org/W2104974024"],"abstract_inverted_index":{"Process":[0],"variation":[1],"(PV)":[2],"is":[3],"a":[4,19],"conspicuous":[5],"predicament":[6],"for":[7],"submicrometer":[8],"VLSI":[9],"circuits.":[10],"In":[11],"this":[12],"paper,":[13],"we":[14,56],"illustrate":[15],"\u201cchoke":[16],"points\u201d":[17],"as":[18,105],"vital":[20],"consequence":[21],"of":[22,45,89],"PV":[23,32],"in":[24,82,97,102],"the":[25,43,51,65,73,83],"near-threshold":[26],"computing":[27],"domain.":[28],"Choke":[29],"points":[30],"are":[31],"affected":[33],"sensitized":[34],"logic":[35],"gates":[36],"with":[37,107,114],"increased":[38],"delay":[39],"deviation.":[40],"They":[41],"dominate":[42],"choice":[44],"critical":[46],"paths":[47],"postfabrication.":[48],"To":[49],"mitigate":[50],"timing":[52,66,109],"errors":[53,81],"induced":[54],"thereby,":[55],"propose":[57,86],"dynamic":[58],"choke":[59],"sensing":[60],"(DCS).":[61],"This":[62],"technique":[63],"senses":[64],"error":[67,110],"causing":[68,80],"opcode":[69],"sequences,":[70],"and":[71,99,117],"uses":[72],"knowledge":[74],"to":[75],"prevent":[76],"similar":[77],"sequences":[78],"from":[79],"future.":[84],"We":[85],"two":[87],"variants":[88],"our":[90],"scheme.":[91],"Our":[92],"techniques":[93],"provide":[94],"~55%":[95],"improvement":[96,101],"performance":[98],"~73%":[100],"energy":[103],"efficiency":[104],"compared":[106],"popular":[108],"mitigation":[111],"scheme,":[112],"Razor,":[113],"minimal":[115],"area":[116],"power":[118],"overheads.":[119]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}