{"id":"https://openalex.org/W2735728047","doi":"https://doi.org/10.1109/tvlsi.2017.2718625","title":"Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs","display_name":"Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs","publication_year":2017,"publication_date":"2017-07-14","ids":{"openalex":"https://openalex.org/W2735728047","doi":"https://doi.org/10.1109/tvlsi.2017.2718625","mag":"2735728047"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2718625","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2718625","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072282417","display_name":"Antonio Gin\u00e9s","orcid":"https://orcid.org/0000-0001-5272-5802"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"A. J. Gines","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091600572","display_name":"E. Peral\u00edas","orcid":"https://orcid.org/0000-0003-0629-0785"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"E. J. Peralias","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066990447","display_name":"A. Rueda","orcid":"https://orcid.org/0000-0003-4564-9359"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Rueda","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Seville (IMSE-CNM), Universidad de Seville, Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5072282417"],"corresponding_institution_ids":["https://openalex.org/I4210104545"],"apc_list":null,"apc_paid":null,"fwci":0.1308,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.47883179,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"25","issue":"10","first_page":"2966","last_page":"2970"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.8709406852722168},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7264680862426758},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5794870853424072},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5495313405990601},{"id":"https://openalex.org/keywords/accumulator","display_name":"Accumulator (cryptography)","score":0.5363091230392456},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.49881529808044434},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4896610379219055},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48493674397468567},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28417253494262695},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23832282423973083},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16611966490745544},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12729069590568542}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.8709406852722168},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7264680862426758},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5794870853424072},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5495313405990601},{"id":"https://openalex.org/C2078106","wikidata":"https://www.wikidata.org/wiki/Q14906620","display_name":"Accumulator (cryptography)","level":2,"score":0.5363091230392456},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.49881529808044434},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4896610379219055},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48493674397468567},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28417253494262695},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23832282423973083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16611966490745544},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12729069590568542},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2017.2718625","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2718625","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:digital.csic.es:10261/195249","is_oa":false,"landing_page_url":"http://hdl.handle.net/10261/195249","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"art\u00edculo"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G938941817","display_name":null,"funder_award_id":"4000108445-13-NL-RA","funder_id":"https://openalex.org/F4320318240","funder_display_name":"European Space Agency"}],"funders":[{"id":"https://openalex.org/F4320318240","display_name":"European Space Agency","ror":"https://ror.org/03wd9za21"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2089966768","https://openalex.org/W2102252821","https://openalex.org/W2111708953","https://openalex.org/W2137512755","https://openalex.org/W2153314955","https://openalex.org/W2178958574","https://openalex.org/W4239486830"],"related_works":["https://openalex.org/W2034349229","https://openalex.org/W4366783034","https://openalex.org/W2005410346","https://openalex.org/W1972415042","https://openalex.org/W4313221225","https://openalex.org/W2150642609","https://openalex.org/W2044867305","https://openalex.org/W3161676474","https://openalex.org/W2049207285","https://openalex.org/W1965493748"],"abstract_inverted_index":{"This":[0,64],"brief":[1],"presents":[2],"a":[3,82,147,152,161],"digital":[4,128,131],"calibration":[5],"technique":[6],"for":[7,70],"compensating":[8],"timing-skew":[9],"errors":[10],"between":[11],"the":[12,15,18,28,40,44,52,77,88,92,100,110,119],"sub-ADC":[13,33],"and":[14,58,85,124,133,143],"MDAC":[16,53],"in":[17,61,141,151,160],"first":[19],"stage":[20],"of":[21,30,87,102,109,118],"sample-and-hold":[22],"amplifier":[23],"(SHA)-less":[24],"pipeline":[25,158],"ADCs.":[26],"In":[27],"presence":[29],"clock-skew":[31],"errors,":[32],"comparators":[34,132],"produce":[35],"time-variant":[36],"offsets":[37],"depending":[38],"on":[39],"input-signal":[41],"slope":[42],"at":[43,51],"sampling":[45],"instants.":[46],"These":[47],"increase":[48],"residue":[49],"excursions":[50],"output,":[54],"potentially":[55],"causing":[56],"overranging":[57,78],"an":[59],"increment":[60],"nonlinear":[62],"errors.":[63],"paper":[65],"derives":[66],"close":[67],"analytical":[68],"expressions":[69],"these":[71],"effects.":[72],"The":[73,137],"proposed":[74],"method":[75,138],"uses":[76],"information":[79],"to":[80],"perform":[81],"low-cost":[83],"estimation":[84],"correction":[86],"skew":[89,111],"error":[90,112],"with":[91],"following":[93],"features:":[94],"1)":[95],"very":[96],"fast":[97],"convergence":[98],"(in":[99],"order":[101],"1-k":[103],"input":[104,120],"samples);":[105],"2)":[106],"indirect":[107],"evaluation":[108],"signal,":[113],"without":[114],"any":[115],"previous":[116],"knowledge":[117],"signal's":[121],"frequency":[122],"distribution;":[123],"3)":[125],"relatively":[126],"simple":[127],"logic-basically,":[129],"two":[130],"one":[134],"small":[135],"accumulator.":[136],"was":[139],"verified":[140],"behavioral":[142],"transistor-level":[144],"simulations.":[145],"As":[146],"demonstrator,":[148],"its":[149],"implementation":[150],"1.8-V":[153],"80-dB":[154],"SNDR":[155],"100-Msps":[156],"SHA-less":[157],"ADC":[159],"0.18-\u03bcm":[162],"CMOS":[163],"process":[164],"is":[165],"shown.":[166]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
