{"id":"https://openalex.org/W2725858331","doi":"https://doi.org/10.1109/tvlsi.2017.2710020","title":"Calibration of Floating-Gate SoC FPAA System","display_name":"Calibration of Floating-Gate SoC FPAA System","publication_year":2017,"publication_date":"2017-07-06","ids":{"openalex":"https://openalex.org/W2725858331","doi":"https://doi.org/10.1109/tvlsi.2017.2710020","mag":"2725858331"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2017.2710020","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2710020","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101978051","display_name":"Sihwan Kim","orcid":"https://orcid.org/0000-0002-3930-965X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sihwan Kim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066075891","display_name":"Sahil Shah","orcid":"https://orcid.org/0000-0001-7403-2388"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sahil Shah","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073433071","display_name":"Jennifer Hasler","orcid":"https://orcid.org/0000-0002-6866-3156"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jennifer Hasler","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101978051"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":2.3544,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.8817868,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"25","issue":"9","first_page":"2649","last_page":"2657"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.9252562522888184},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.624317467212677},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.621833860874176},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49741342663764954},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4941902458667755},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.47028636932373047},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.44592583179473877},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.44242310523986816},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.42209839820861816},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4213125705718994},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4111965298652649},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3402826189994812},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2852267026901245},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2465953528881073},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.2082638442516327},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.19270765781402588},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1349412500858307}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.9252562522888184},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.624317467212677},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.621833860874176},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49741342663764954},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4941902458667755},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.47028636932373047},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.44592583179473877},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.44242310523986816},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.42209839820861816},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4213125705718994},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4111965298652649},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3402826189994812},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2852267026901245},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2465953528881073},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.2082638442516327},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.19270765781402588},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1349412500858307},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2017.2710020","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2017.2710020","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1981646843","https://openalex.org/W1982965615","https://openalex.org/W2040429262","https://openalex.org/W2046857741","https://openalex.org/W2051385641","https://openalex.org/W2061180981","https://openalex.org/W2061402905","https://openalex.org/W2079826846","https://openalex.org/W2104794633","https://openalex.org/W2105090981","https://openalex.org/W2111428553","https://openalex.org/W2132322330","https://openalex.org/W2134113654","https://openalex.org/W2136419424","https://openalex.org/W2142400955","https://openalex.org/W2153181976","https://openalex.org/W2159989367","https://openalex.org/W2172018329","https://openalex.org/W2253818459","https://openalex.org/W2342714807","https://openalex.org/W2343850787","https://openalex.org/W2574711956","https://openalex.org/W6675640900","https://openalex.org/W6704241941"],"related_works":["https://openalex.org/W1886625815","https://openalex.org/W2089088242","https://openalex.org/W2145104756","https://openalex.org/W2343687813","https://openalex.org/W2113697565","https://openalex.org/W2997198572","https://openalex.org/W2760424941","https://openalex.org/W1965508384","https://openalex.org/W2117233677","https://openalex.org/W1489445348"],"abstract_inverted_index":{"We":[0,15],"present":[1],"a":[2,6,64,68,84,94,100,103],"calibration":[3,60],"flow":[4],"for":[5],"large-scale":[7],"floating-gate":[8],"(FG)":[9],"system-on-chip":[10],"field":[11],"programmable":[12],"analog":[13,86],"array.":[14],"focus":[16],"on":[17,45,83,105],"characterizing":[18],"the":[19,30,78,91],"FG":[20,46],"programming":[21],"infrastructure":[22],"and":[23,33,37,80,102],"hot-electron":[24],"injection":[25],"parameters,":[26],"MOSFET":[27],"parameters":[28],"using":[29,55],"EKV":[31],"model,":[32],"calibrating":[34],"digital-analog":[35],"converters":[36],"analog-digital":[38],"converters.":[39],"In":[40],"addition,":[41],"threshold":[42],"voltage":[43],"mismatches":[44],"devices":[47],"due":[48],"to":[49,75],"their":[50],"indirect":[51],"structure":[52],"are":[53],"characterized":[54],"on-chip":[56],"measurement":[57],"techniques.":[58],"The":[59],"results":[61,92],"in":[62],"enabling":[63],"digital":[65],"approach,":[66],"where":[67],"design":[69],"can":[70],"be":[71],"programmed":[72],"without":[73],"having":[74],"deal":[76],"with":[77],"local":[79],"global":[81],"mismatches,":[82],"reconfigurable":[85],"system.":[87],"This":[88],"paper":[89],"shows":[90],"of":[93],"compiled":[95],"nonlinear":[96],"classifier":[97],"block":[98],"comprising":[99],"vector-matrix-multiplier":[101],"winner-takes-all":[104],"three":[106],"different":[107],"calibrated":[108],"chips.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":5}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}