{"id":"https://openalex.org/W2558930851","doi":"https://doi.org/10.1109/tvlsi.2016.2627578","title":"Fast Automatic Frequency Calibrator Using an Adaptive Frequency Search Algorithm","display_name":"Fast Automatic Frequency Calibrator Using an Adaptive Frequency Search Algorithm","publication_year":2016,"publication_date":"2016-12-02","ids":{"openalex":"https://openalex.org/W2558930851","doi":"https://doi.org/10.1109/tvlsi.2016.2627578","mag":"2558930851"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2016.2627578","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2627578","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102293746","display_name":"Hyuk Ju Ryu","orcid":null},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyuk Ryu","raw_affiliation_strings":["School of Electrical Engineering, Chung-Ang University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Chung-Ang University, Seoul, South Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041313432","display_name":"Eun\u2010Taek Sung","orcid":"https://orcid.org/0000-0001-6513-3523"},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Eun-Taek Sung","raw_affiliation_strings":["School of Electrical Engineering, Chung-Ang University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Chung-Ang University, Seoul, South Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103594077","display_name":"Sangyong Park","orcid":null},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sangyong Park","raw_affiliation_strings":["School of Electrical Engineering, Chung-Ang University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Chung-Ang University, Seoul, South Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031555537","display_name":"Je-Kwang Cho","orcid":"https://orcid.org/0000-0003-4065-4351"},"institutions":[{"id":"https://openalex.org/I4210131320","display_name":"LG (South Korea)","ror":"https://ror.org/03ddh2c27","country_code":"KR","type":"company","lineage":["https://openalex.org/I4210131320"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Je-Kwang Cho","raw_affiliation_strings":["System Integrated Circuits Center, IP TechnologyTeam, LG Electronics, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-4065-4351","affiliations":[{"raw_affiliation_string":"System Integrated Circuits Center, IP TechnologyTeam, LG Electronics, Seoul, South Korea","institution_ids":["https://openalex.org/I4210131320"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082116439","display_name":"Donghyun Baek","orcid":"https://orcid.org/0000-0003-0675-1115"},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Donghyun Baek","raw_affiliation_strings":["School of Electrical Engineering, Chung-Ang University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0675-1115","affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Chung-Ang University, Seoul, South Korea","institution_ids":["https://openalex.org/I67900169"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5581,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.72570461,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"25","issue":"4","first_page":"1490","last_page":"1496"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7767744064331055},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6049041152000427},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.6042529344558716},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.5767370462417603},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.5517093539237976},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5315719842910767},{"id":"https://openalex.org/keywords/binary-search-algorithm","display_name":"Binary search algorithm","score":0.5165833234786987},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.48692619800567627},{"id":"https://openalex.org/keywords/frequency-drift","display_name":"Frequency drift","score":0.4749448597431183},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.4561852514743805},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.45024585723876953},{"id":"https://openalex.org/keywords/automatic-frequency-control","display_name":"Automatic frequency control","score":0.43287748098373413},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4299236536026001},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.375785231590271},{"id":"https://openalex.org/keywords/search-algorithm","display_name":"Search algorithm","score":0.3170214295387268},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2116870880126953},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.11527195572853088},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10641083121299744},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.09971976280212402},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08174154162406921}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7767744064331055},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6049041152000427},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.6042529344558716},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.5767370462417603},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.5517093539237976},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5315719842910767},{"id":"https://openalex.org/C121610932","wikidata":"https://www.wikidata.org/wiki/Q243754","display_name":"Binary search algorithm","level":3,"score":0.5165833234786987},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.48692619800567627},{"id":"https://openalex.org/C122348159","wikidata":"https://www.wikidata.org/wiki/Q5502869","display_name":"Frequency drift","level":4,"score":0.4749448597431183},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.4561852514743805},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.45024585723876953},{"id":"https://openalex.org/C25915539","wikidata":"https://www.wikidata.org/wiki/Q220786","display_name":"Automatic frequency control","level":2,"score":0.43287748098373413},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4299236536026001},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.375785231590271},{"id":"https://openalex.org/C125583679","wikidata":"https://www.wikidata.org/wiki/Q755673","display_name":"Search algorithm","level":2,"score":0.3170214295387268},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2116870880126953},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.11527195572853088},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10641083121299744},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.09971976280212402},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08174154162406921},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2016.2627578","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2627578","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4176442450","display_name":null,"funder_award_id":"2013R1A1A2060885","funder_id":"https://openalex.org/F4320322120","funder_display_name":"National Research Foundation of Korea"},{"id":"https://openalex.org/G8165010679","display_name":null,"funder_award_id":"NIPA-2013-(H0301-13-1013)","funder_id":"https://openalex.org/F4320322030","funder_display_name":"Ministry of Science, ICT and Future Planning"}],"funders":[{"id":"https://openalex.org/F4320322030","display_name":"Ministry of Science, ICT and Future Planning","ror":"https://ror.org/032e49973"},{"id":"https://openalex.org/F4320322120","display_name":"National Research Foundation of Korea","ror":"https://ror.org/013aysd81"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W994652455","https://openalex.org/W1492059061","https://openalex.org/W2061100613","https://openalex.org/W2064306460","https://openalex.org/W2085307869","https://openalex.org/W2108370022","https://openalex.org/W2123266073","https://openalex.org/W2126040583","https://openalex.org/W2137958855","https://openalex.org/W2140960599","https://openalex.org/W2141107443","https://openalex.org/W2160063814","https://openalex.org/W2546124590","https://openalex.org/W6665874464"],"related_works":["https://openalex.org/W4385187383","https://openalex.org/W2148543737","https://openalex.org/W2942714496","https://openalex.org/W2117625922","https://openalex.org/W1968474967","https://openalex.org/W1985004612","https://openalex.org/W2014964613","https://openalex.org/W2037418377","https://openalex.org/W2252611211","https://openalex.org/W1552516838"],"abstract_inverted_index":{"A":[0],"new":[1],"adaptive":[2],"frequency":[3,13,31,41,52,58,72],"search":[4,53,59],"algorithm":[5,54],"(A-FSA)":[6],"is":[7,63,89],"presented":[8],"for":[9,29,87],"a":[10,50,91,115,130,140],"fast":[11],"automatic":[12],"calibrator":[14],"in":[15],"wideband":[16,108],"phase-locked":[17],"loops":[18],"(PLLs).":[19],"The":[20,83,127],"proposed":[21,105],"A-FSA":[22,88],"optimizes":[23],"the":[24,36,39,43,57,71,78,101,104,123,135],"number":[25],"of":[26,103,142],"clock":[27],"counts":[28],"each":[30],"comparison":[32,73],"cycle,":[33],"depending":[34],"on":[35],"difference":[37],"between":[38],"target":[40],"and":[42,75,112,122],"PLL":[44,80],"output":[45],"frequency,":[46],"as":[47],"opposed":[48],"to":[49],"binary":[51],"(B-FSA),":[55],"where":[56],"time":[60,132],"per":[61],"cycle":[62],"fixed.":[64],"This":[65],"eliminates":[66],"unnecessary":[67],"clocking":[68],"times":[69],"during":[70],"process,":[74],"thus":[76,95],"reduces":[77],"total":[79],"lock":[81,131],"time.":[82],"additional":[84],"circuitry":[85],"needed":[86],"only":[90],"simple":[92],"counter":[93],"controller,":[94],"minimizing":[96],"hardware":[97],"overhead.":[98],"To":[99],"verify":[100],"effectiveness":[102],"algorithm,":[106],"two":[107],"PLLs":[109],"are":[110],"designed":[111],"simulated":[113],"using":[114],"65-nm":[116],"CMOS":[117],"technology:":[118],"one":[119],"with":[120,125],"B-FSA,":[121],"other":[124],"A-FSA.":[126],"latter":[128],"achieves":[129],"faster":[133],"than":[134],"former":[136],"by":[137],"at":[138],"least":[139],"factor":[141],"2,":[143],"even":[144],"under":[145],"worst":[146],"case":[147],"conditions.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
