{"id":"https://openalex.org/W2518583622","doi":"https://doi.org/10.1109/tvlsi.2016.2597182","title":"Analysis and Reduction of Nonidealities in Stacked-Transistor Current Sources","display_name":"Analysis and Reduction of Nonidealities in Stacked-Transistor Current Sources","publication_year":2016,"publication_date":"2016-08-24","ids":{"openalex":"https://openalex.org/W2518583622","doi":"https://doi.org/10.1109/tvlsi.2016.2597182","mag":"2518583622"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2016.2597182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2597182","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103259706","display_name":"Derui Kong","orcid":"https://orcid.org/0000-0003-2938-3087"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Derui Kong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108712073","display_name":"Dong-Won Seo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dongwon Seo","raw_affiliation_strings":["Department of Mixed Signal Design, Qualcomm Technologies, Inc., San Diego, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Mixed Signal Design, Qualcomm Technologies, Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100342116","display_name":"Sang Min Lee","orcid":"https://orcid.org/0000-0002-8234-520X"},"institutions":[{"id":"https://openalex.org/I4210087596","display_name":"Qualcomm (United States)","ror":"https://ror.org/002zrf773","country_code":"US","type":"company","lineage":["https://openalex.org/I4210087596"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sang Min Lee","raw_affiliation_strings":["Department of Mixed Signal Design, Qualcomm Technologies, Inc., San Diego, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Mixed Signal Design, Qualcomm Technologies, Inc., San Diego, CA, USA","institution_ids":["https://openalex.org/I4210087596"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5103259706"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":0.3419,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63641673,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"25","issue":"2","first_page":"774","last_page":"778"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.8060981035232544},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6059085726737976},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6048004031181335},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.5422457456588745},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.4574635624885559},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.4416537284851074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4186205565929413},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37078148126602173},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.33138740062713623},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27389007806777954},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19201502203941345},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1550142467021942}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.8060981035232544},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6059085726737976},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6048004031181335},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.5422457456588745},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.4574635624885559},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.4416537284851074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4186205565929413},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37078148126602173},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.33138740062713623},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27389007806777954},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19201502203941345},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1550142467021942},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2016.2597182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2597182","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W571960815","https://openalex.org/W1578778490","https://openalex.org/W1996594407","https://openalex.org/W2086228634","https://openalex.org/W2095273620","https://openalex.org/W2102091251","https://openalex.org/W2140823559","https://openalex.org/W2153232339"],"related_works":["https://openalex.org/W4297984620","https://openalex.org/W2155760971","https://openalex.org/W2089474519","https://openalex.org/W2116267755","https://openalex.org/W2180191255","https://openalex.org/W1988639050","https://openalex.org/W1970405711","https://openalex.org/W1499398510","https://openalex.org/W2172074914","https://openalex.org/W2097265805"],"abstract_inverted_index":{"An":[0],"in-depth":[1],"analysis":[2,13],"of":[3,5,17,25,32,40,56,69,92],"nonidealities":[4],"CMOS":[6],"stacked-transistor":[7,26,41,70,93],"current":[8,27,42,71,94],"sources":[9,28,72,95],"is":[10,84],"presented.":[11],"This":[12],"quantifies":[14],"the":[15,22,30,37,54,67,81,89],"impact":[16],"series":[18],"parasitic":[19],"resistance":[20],"on":[21,36,80],"systematic":[23],"error":[24],"and":[29],"effect":[31],"partition":[33],"ratio/partition":[34],"number":[35],"random":[38,90],"mismatch":[39,91],"sources.":[43],"The":[44],"analytical":[45,82],"results":[46,83],"are":[47,73],"presented":[48],"in":[49,66],"closed-form":[50],"formulas":[51],"that":[52,86],"enable":[53],"explanation":[55],"many":[57],"second-order":[58],"effects":[59],"seen":[60],"from":[61],"circuit":[62],"simulation.":[63],"Various":[64],"tradeoffs":[65],"design":[68],"discussed.":[74],"A":[75],"weighted":[76],"sizing":[77],"technique":[78],"based":[79],"proposed":[85],"can":[87],"optimize":[88],"for":[96],"a":[97],"given":[98],"area":[99],"budget.":[100]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}