{"id":"https://openalex.org/W2369950074","doi":"https://doi.org/10.1109/tvlsi.2016.2555984","title":"Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels","display_name":"Energy-Efficient Adaptive Hardware Accelerator for Text Mining Application Kernels","publication_year":2016,"publication_date":"2016-05-11","ids":{"openalex":"https://openalex.org/W2369950074","doi":"https://doi.org/10.1109/tvlsi.2016.2555984","mag":"2369950074"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2016.2555984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2555984","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049193989","display_name":"Robert Karam","orcid":"https://orcid.org/0000-0002-2713-029X"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Robert Karam","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045722906","display_name":"Ruchir Puri","orcid":"https://orcid.org/0009-0006-8803-7079"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ruchir Puri","raw_affiliation_strings":["IBM Thomas J. Watson Research Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039442844","display_name":"Swarup Bhunia","orcid":"https://orcid.org/0000-0001-6082-6961"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]},{"id":"https://openalex.org/I58956616","display_name":"Case Western Reserve University","ror":"https://ror.org/051fd9666","country_code":"US","type":"education","lineage":["https://openalex.org/I58956616"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Swarup Bhunia","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH, USA","Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH, USA","institution_ids":["https://openalex.org/I58956616"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5049193989"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":2.8989,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.90270766,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"24","issue":"12","first_page":"3526","last_page":"3537"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6188879609107971},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5443382859230042},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.518652617931366},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39394068717956543},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3913121223449707},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3837570250034332},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3750155568122864},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2169586420059204}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6188879609107971},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5443382859230042},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.518652617931366},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39394068717956543},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3913121223449707},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3837570250034332},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3750155568122864},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2169586420059204},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2016.2555984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2555984","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G3366926682","display_name":null,"funder_award_id":"2578.001","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W185368777","https://openalex.org/W648130861","https://openalex.org/W1505837402","https://openalex.org/W1536792390","https://openalex.org/W1643634815","https://openalex.org/W1707172707","https://openalex.org/W1965024872","https://openalex.org/W1969768839","https://openalex.org/W1987439595","https://openalex.org/W2015558226","https://openalex.org/W2021581601","https://openalex.org/W2024228866","https://openalex.org/W2025787141","https://openalex.org/W2029305709","https://openalex.org/W2058950969","https://openalex.org/W2062143991","https://openalex.org/W2068362367","https://openalex.org/W2071871891","https://openalex.org/W2098162425","https://openalex.org/W2107440355","https://openalex.org/W2112980698","https://openalex.org/W2140834004","https://openalex.org/W2144211451","https://openalex.org/W2147152072","https://openalex.org/W2162031231","https://openalex.org/W2162045553","https://openalex.org/W2999246549","https://openalex.org/W4214853294","https://openalex.org/W4253993501","https://openalex.org/W6607564326","https://openalex.org/W6637452973","https://openalex.org/W6657550042","https://openalex.org/W6684051632"],"related_works":["https://openalex.org/W2002703587","https://openalex.org/W2980006224","https://openalex.org/W2063534976","https://openalex.org/W2284838239","https://openalex.org/W2365743651","https://openalex.org/W2369375926","https://openalex.org/W2918037051","https://openalex.org/W3147787617","https://openalex.org/W2541819923","https://openalex.org/W4295855328"],"abstract_inverted_index":{"Text":[0],"mining":[1,171],"is":[2,138],"a":[3,60,134,174,184],"growing":[4],"field":[5],"of":[6,12,28,83,130,154,182,197],"applications,":[7],"which":[8,69],"enables":[9],"the":[10,26,55,80,87,127,131],"analysis":[11],"large":[13],"text":[14,66,117,170,186],"data":[15,30,97,206],"sets":[16,31],"using":[17],"statistical":[18],"methods.":[19],"In":[20],"recent":[21],"years,":[22],"exponential":[23],"increase":[24],"in":[25,54,157],"size":[27],"these":[29],"has":[32],"strained":[33],"existing":[34],"systems,":[35,68],"requiring":[36],"more":[37],"computing":[38],"power,":[39,141],"server":[40],"hardware,":[41],"networking":[42],"interconnects,":[43],"and":[44,74,102,133,143,162,188,201,209],"power":[45,76],"consumption.":[46,77],"For":[47],"practical":[48],"reasons,":[49],"this":[50],"trend":[51],"cannot":[52],"continue":[53],"future.":[56],"Instead,":[57],"we":[58,177],"propose":[59],"reconfigurable":[61],"hardware":[62],"accelerator":[63,137,147],"designed":[64],"for":[65,89,140,168],"analytics":[67,189],"can":[70,148,191],"simultaneously":[71],"improve":[72],"performance":[73,181],"reduce":[75],"Situated":[78],"near":[79],"last":[81],"level":[82],"memory,":[84],"it":[85],"mitigates":[86],"need":[88],"high-bandwidth":[90],"processor-to-memory":[91],"connections,":[92],"instead":[93],"capitalizing":[94],"on":[95],"close":[96],"proximity,":[98],"massively":[99],"parallel":[100],"operation,":[101],"analytic-inspired":[103],"functional":[104,128],"units":[105],"to":[106,113,151],"maximize":[107],"energy":[108,158,208],"efficiency,":[109],"while":[110,203],"remaining":[111],"flexible":[112],"easily":[114],"map":[115],"common":[116],"analytic":[118],"kernels.":[119,172],"A":[120],"field-programmable":[121],"gate":[122],"array-based":[123],"emulation":[124],"framework":[125],"demonstrates":[126],"correctness":[129],"system,":[132],"full":[135],"eight-core":[136],"synthesized":[139],"area,":[142],"delay":[144],"estimates.":[145],"The":[146],"achieve":[149],"two":[150],"three":[152],"orders":[153],"magnitude":[155],"improvement":[156],"efficiency":[159],"versus":[160],"CPU":[161,200],"general-purpose":[163],"graphics":[164],"processing":[165],"unit":[166],"(GPU)":[167],"various":[169],"As":[173],"case":[175],"study,":[176],"demonstrate":[178],"how":[179],"indexing":[180],"Lucene,":[183],"popular":[185],"search":[187],"platform,":[190],"be":[192],"improved":[193],"by":[194],"an":[195],"average":[196],"70%":[198],"over":[199],"GPU":[202],"significantly":[204],"reducing":[205],"transfer":[207],"latency.":[210]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":4}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}