{"id":"https://openalex.org/W2315706183","doi":"https://doi.org/10.1109/tvlsi.2016.2535224","title":"Exploiting Intracell Bit-Error Characteristics to Improve Min-Sum LDPC Decoding for MLC NAND Flash-Based Storage in Mobile Device","display_name":"Exploiting Intracell Bit-Error Characteristics to Improve Min-Sum LDPC Decoding for MLC NAND Flash-Based Storage in Mobile Device","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2315706183","doi":"https://doi.org/10.1109/tvlsi.2016.2535224","mag":"2315706183"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2016.2535224","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2535224","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100706029","display_name":"Hongbin Sun","orcid":"https://orcid.org/0000-0003-2153-2906"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongbin Sun","raw_affiliation_strings":["Xi\u2019an Jiaotong University, Xi\u2019an, China","Xi'an Jiaotong University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0003-2153-2906","affiliations":[{"raw_affiliation_string":"Xi\u2019an Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"Xi'an Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103215955","display_name":"Wenzhe Zhao","orcid":"https://orcid.org/0009-0009-1517-9422"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenzhe Zhao","raw_affiliation_strings":["Xi\u2019an Jiaotong University, Xi\u2019an, China","Xi'an Jiaotong University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xi\u2019an Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"Xi'an Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112516705","display_name":"Minjie Lv","orcid":null},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Minjie Lv","raw_affiliation_strings":["Xi\u2019an Jiaotong University, Xi\u2019an, China","Xi'an Jiaotong University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xi\u2019an Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"Xi'an Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053635255","display_name":"Guiqiang Dong","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Guiqiang Dong","raw_affiliation_strings":["Skyera Inc., San Jose, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Skyera Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047405956","display_name":"Nanning Zheng","orcid":"https://orcid.org/0000-0003-1608-8257"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Nanning Zheng","raw_affiliation_strings":["Xi\u2019an Jiaotong University, Xi\u2019an, China","Xi'an Jiaotong University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xi\u2019an Jiaotong University, Xi\u2019an, China","institution_ids":["https://openalex.org/I87445476"]},{"raw_affiliation_string":"Xi'an Jiaotong University, Xi'an, China","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100378792","display_name":"Tong Zhang","orcid":"https://orcid.org/0000-0002-5511-2558"},"institutions":[{"id":"https://openalex.org/I165799507","display_name":"Rensselaer Polytechnic Institute","ror":"https://ror.org/01rtyzb94","country_code":"US","type":"education","lineage":["https://openalex.org/I165799507"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tong Zhang","raw_affiliation_strings":["Rensselaer Polytechnic Institute, Troy, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rensselaer Polytechnic Institute, Troy, NY, USA","institution_ids":["https://openalex.org/I165799507"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":5.7493,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.95984581,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"24","issue":"8","first_page":"2654","last_page":"2664"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7483111619949341},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7446978092193604},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6292200684547424},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.5893503427505493},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5420016646385193},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.49034833908081055},{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.48948943614959717},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44573381543159485},{"id":"https://openalex.org/keywords/computer-data-storage","display_name":"Computer data storage","score":0.4276404082775116},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4221937954425812},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33932673931121826},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33522671461105347},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3303532600402832},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22175198793411255},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12730279564857483}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7483111619949341},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7446978092193604},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6292200684547424},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.5893503427505493},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5420016646385193},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.49034833908081055},{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.48948943614959717},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44573381543159485},{"id":"https://openalex.org/C194739806","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Computer data storage","level":2,"score":0.4276404082775116},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4221937954425812},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33932673931121826},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33522671461105347},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3303532600402832},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22175198793411255},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12730279564857483},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2016.2535224","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2016.2535224","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G5337389384","display_name":null,"funder_award_id":"61274028","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W142764049","https://openalex.org/W1553622981","https://openalex.org/W1967782606","https://openalex.org/W1977034714","https://openalex.org/W1989717322","https://openalex.org/W1994278419","https://openalex.org/W2024819559","https://openalex.org/W2043287599","https://openalex.org/W2061539348","https://openalex.org/W2082313539","https://openalex.org/W2096084217","https://openalex.org/W2096737354","https://openalex.org/W2100307260","https://openalex.org/W2115165154","https://openalex.org/W2135764410","https://openalex.org/W2136925580","https://openalex.org/W2155433131","https://openalex.org/W2156076822","https://openalex.org/W2170398105","https://openalex.org/W2170723844","https://openalex.org/W2171258019","https://openalex.org/W6605716994","https://openalex.org/W6633130854","https://openalex.org/W6661139341"],"related_works":["https://openalex.org/W3114356617","https://openalex.org/W2575916283","https://openalex.org/W3014621876","https://openalex.org/W2116848318","https://openalex.org/W2783843154","https://openalex.org/W144202416","https://openalex.org/W1967782606","https://openalex.org/W2757574298","https://openalex.org/W4205845548","https://openalex.org/W1971638737"],"abstract_inverted_index":{"A":[0],"multilevel":[1],"per":[2],"cell":[3],"(MLC)":[4],"technique":[5],"significantly":[6],"improves":[7],"the":[8,25,31,38,45,62,74,99,107,122,126,132,142],"storage":[9,42,111],"density,":[10],"but":[11],"also":[12],"poses":[13],"serious":[14],"data":[15,71,86,91],"integrity":[16],"challenge":[17],"for":[18,106],"NAND":[19,76,109],"flash":[20,77],"memory.":[21],"This":[22],"consequently":[23],"makes":[24],"low-density":[26],"parity-check":[27],"(LDPC)":[28],"code":[29],"and":[30,70,89,103,140],"soft-decision":[32],"memory":[33,52],"sensing":[34],"become":[35],"indispensable":[36],"in":[37,73,112],"next-generation":[39],"flash-based":[40,110],"solid-state":[41],"devices.":[43],"However,":[44],"use":[46],"of":[47,64],"LDPC":[48,94,100,133],"codes":[49],"inevitably":[50],"increases":[51],"read":[53],"latency":[54],"and,":[55],"hence,":[56],"degrades":[57],"speed":[58],"performance.":[59],"Motivated":[60],"by":[61,120,136,145],"observation":[63],"intracell":[65,85,90,123],"unbalanced":[66],"bit":[67],"error":[68],"probability":[69],"dependence":[72,92],"MLC":[75,108],"memory,":[78],"this":[79],"paper":[80],"proposes":[81],"two":[82],"techniques,":[83],"i.e.,":[84],"placement":[87],"interleaving":[88],"aware":[93],"decoding,":[95],"to":[96,138,147],"efficiently":[97],"improve":[98,131],"decoding":[101,134],"throughput":[102,135],"energy":[104,143],"efficiency":[105],"a":[113],"mobile":[114],"device.":[115],"Experimental":[116],"results":[117],"show":[118],"that,":[119],"exploiting":[121],"bit-error":[124],"characteristics,":[125],"proposed":[127],"techniques":[128],"together":[129],"can":[130],"up":[137,146],"84.6%":[139],"reduce":[141],"consumption":[144],"33.2%":[148],"while":[149],"only":[150],"incurring":[151],"less":[152],"than":[153],"0.2%":[154],"silicon":[155],"area":[156],"overhead.":[157]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":11},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
