{"id":"https://openalex.org/W2342664696","doi":"https://doi.org/10.1109/tvlsi.2015.2499387","title":"Optimized Built-In Self-Repair for Multiple Memories","display_name":"Optimized Built-In Self-Repair for Multiple Memories","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2342664696","doi":"https://doi.org/10.1109/tvlsi.2015.2499387","mag":"2342664696"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2499387","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2499387","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004519266","display_name":"Wooheon Kang","orcid":"https://orcid.org/0009-0003-3272-1582"},"institutions":[{"id":"https://openalex.org/I10654025","display_name":"SK Group (United States)","ror":"https://ror.org/00qajw440","country_code":"US","type":"company","lineage":["https://openalex.org/I10654025","https://openalex.org/I134353371"]},{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR","US"],"is_corresponding":false,"raw_author_name":"Wooheon Kang","raw_affiliation_strings":["dynamic random access memory Product Development Division, Computer Aided Engineering Group, SK Hynix, Inc., Icheon, Korea","[dynamic random access memory Product Development Division, Computer Aided Engineering Group, SK Hynix, Inc., Icheon, Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"dynamic random access memory Product Development Division, Computer Aided Engineering Group, SK Hynix, Inc., Icheon, Korea","institution_ids":["https://openalex.org/I10654025"]},{"raw_affiliation_string":"[dynamic random access memory Product Development Division, Computer Aided Engineering Group, SK Hynix, Inc., Icheon, Korea]","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045171576","display_name":"Chang-Wook Lee","orcid":"https://orcid.org/0000-0001-7235-3225"},"institutions":[{"id":"https://openalex.org/I10654025","display_name":"SK Group (United States)","ror":"https://ror.org/00qajw440","country_code":"US","type":"company","lineage":["https://openalex.org/I10654025","https://openalex.org/I134353371"]},{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR","US"],"is_corresponding":false,"raw_author_name":"Changwook Lee","raw_affiliation_strings":["Probe Test Engineering Team, SK Hynix, Inc., Icheon, Korea","[Probe Test Engineering Team, SK Hynix, Inc., Icheon, Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Probe Test Engineering Team, SK Hynix, Inc., Icheon, Korea","institution_ids":["https://openalex.org/I10654025"]},{"raw_affiliation_string":"[Probe Test Engineering Team, SK Hynix, Inc., Icheon, Korea]","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110360681","display_name":"Hyunyul Lim","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyunyul Lim","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","[Department of Electrical & Electronic Engineering Yonsei University, Seoul, Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Department of Electrical & Electronic Engineering Yonsei University, Seoul, Korea]","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068528309","display_name":"Sungho Kang","orcid":"https://orcid.org/0000-0002-7093-2095"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungho Kang","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","[Department of Electrical & Electronic Engineering Yonsei University, Seoul, Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Department of Electrical & Electronic Engineering Yonsei University, Seoul, Korea]","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9677,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.77793556,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6916012763977051},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.6295706629753113},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5601405501365662},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5549455881118774},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.5367902517318726},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.48939815163612366},{"id":"https://openalex.org/keywords/row","display_name":"Row","score":0.46852535009384155},{"id":"https://openalex.org/keywords/row-and-column-spaces","display_name":"Row and column spaces","score":0.4501773715019226},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4278929829597473},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3776782751083374},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.33447927236557007},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.31022971868515015},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.145284503698349},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.13774505257606506}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6916012763977051},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.6295706629753113},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5601405501365662},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5549455881118774},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.5367902517318726},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.48939815163612366},{"id":"https://openalex.org/C135598885","wikidata":"https://www.wikidata.org/wiki/Q1366302","display_name":"Row","level":2,"score":0.46852535009384155},{"id":"https://openalex.org/C104140500","wikidata":"https://www.wikidata.org/wiki/Q2088159","display_name":"Row and column spaces","level":3,"score":0.4501773715019226},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4278929829597473},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3776782751083374},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.33447927236557007},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.31022971868515015},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.145284503698349},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.13774505257606506},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2499387","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2499387","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W1792362277","https://openalex.org/W1973508428","https://openalex.org/W2005160252","https://openalex.org/W2009761792","https://openalex.org/W2011675021","https://openalex.org/W2021792911","https://openalex.org/W2034429812","https://openalex.org/W2040066907","https://openalex.org/W2044407030","https://openalex.org/W2060071452","https://openalex.org/W2062143991","https://openalex.org/W2079486027","https://openalex.org/W2083129574","https://openalex.org/W2098987953","https://openalex.org/W2099158291","https://openalex.org/W2102048395","https://openalex.org/W2104613728","https://openalex.org/W2110902223","https://openalex.org/W2114930002","https://openalex.org/W2116273964","https://openalex.org/W2122979515","https://openalex.org/W2132584944","https://openalex.org/W2132880275","https://openalex.org/W2136323667","https://openalex.org/W2139641851","https://openalex.org/W2152425525","https://openalex.org/W2155640457","https://openalex.org/W2159103279","https://openalex.org/W2171019527","https://openalex.org/W3142145731","https://openalex.org/W3203143386","https://openalex.org/W4234013965","https://openalex.org/W6675341223","https://openalex.org/W6677639902","https://openalex.org/W6680745762"],"related_works":["https://openalex.org/W2313440505","https://openalex.org/W3123744736","https://openalex.org/W1505848319","https://openalex.org/W2137691148","https://openalex.org/W2905020035","https://openalex.org/W4281399881","https://openalex.org/W2433052208","https://openalex.org/W3166006430","https://openalex.org/W4281971614","https://openalex.org/W2096502566"],"abstract_inverted_index":{"A":[0],"new":[1],"built-in":[2,34,64],"self-repair":[3],"(BISR)":[4],"scheme":[5,181],"is":[6,110,141,218],"proposed":[7,111,123,139,160],"for":[8,21,102,182],"multiple":[9,22],"embedded":[10,23],"memories":[11,26,50,55,72,184],"to":[12,36,68],"find":[13],"optimum":[14,145],"point":[15,146],"of":[16,19,44,71,105,131,137,164,170,208],"the":[17,31,39,42,62,69,77,114,122,126,132,138,144,148,154,159,165,171,197,202,209,215],"performance":[18,136,205],"BISR":[20,124,140,161,180],"memories.":[24],"All":[25],"are":[27,51,56,82,200],"concurrently":[28],"tested":[29,58],"by":[30,61],"small":[32],"dedicated":[33],"self-test":[35],"figure":[37],"out":[38],"faulty":[40,54],"memories,":[41,201],"number":[43],"faults,":[45],"and":[46,59,80,94,108,150,153,167,173,191,211,214],"irreparability.":[47],"After":[48],"all":[49,103],"tested,":[52],"only":[53],"serially":[57],"repaired":[60],"shared":[63],"redundancy":[65],"analysis":[66,97],"according":[67],"sizes":[70],"in":[73,143,176,206],"descending":[74],"order.":[75],"Thus,":[76],"fast":[78,96],"test":[79,149,172,210],"repair":[81,92,128,151,174,212],"performed":[83],"with":[84,178],"low":[85],"area":[86,155,166,216],"overhead.":[87,156],"To":[88],"accomplish":[89],"an":[90,99],"optimal":[91,127],"rate":[93,129],"a":[95],"speed,":[98],"exhaustive":[100,133],"search":[101],"combinations":[104],"spare":[106],"rows":[107],"columns":[109],"based":[112],"on":[113],"optimized":[115],"fault":[116],"collection.":[117],"Experimental":[118],"results":[119],"show":[120],"that":[121],"has":[125],"because":[130],"search.":[134],"The":[135],"located":[142],"between":[147],"time,":[152,213],"For":[157],"example,":[158],"requires":[162],"49.6%":[163],"1.3":[168],"times":[169],"time":[175],"comparison":[177],"parallel":[179],"four":[183],"(one":[185],"128":[186],"K,":[187,190],"two":[188],"256":[189],"one":[192],"512":[193],"K":[194],"memories).":[195],"Furthermore,":[196],"more":[198,203],"there":[199],"superior":[204],"terms":[207],"overhead":[217],"shown.":[219]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}