{"id":"https://openalex.org/W2336621184","doi":"https://doi.org/10.1109/tvlsi.2015.2485302","title":"Design and Implementation of High-Speed All-Pass Transformation-Based Variable Digital Filters by Breaking the Dependence of Operating Frequency on Filter Order","display_name":"Design and Implementation of High-Speed All-Pass Transformation-Based Variable Digital Filters by Breaking the Dependence of Operating Frequency on Filter Order","publication_year":2015,"publication_date":"2015-10-26","ids":{"openalex":"https://openalex.org/W2336621184","doi":"https://doi.org/10.1109/tvlsi.2015.2485302","mag":"2336621184"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2485302","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2485302","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025805978","display_name":"Abhishek Ambede","orcid":"https://orcid.org/0000-0002-8875-7037"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Abhishek Ambede","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042105714","display_name":"A. P. Vinod","orcid":"https://orcid.org/0000-0001-9408-1275"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"A. P. Vinod","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5025805978"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.5744,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.70160914,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"24","issue":"5","first_page":"2008","last_page":"2012"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.6433835625648499},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6060165166854858},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.5847297310829163},{"id":"https://openalex.org/keywords/prototype-filter","display_name":"Prototype filter","score":0.5832830667495728},{"id":"https://openalex.org/keywords/cutoff-frequency","display_name":"Cutoff frequency","score":0.5664422512054443},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.5660051703453064},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.5422026515007019},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.465621680021286},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4337601065635681},{"id":"https://openalex.org/keywords/high-pass-filter","display_name":"High-pass filter","score":0.41994529962539673},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3697085678577423},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.36773425340652466},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17203012108802795},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14648717641830444}],"concepts":[{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.6433835625648499},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6060165166854858},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.5847297310829163},{"id":"https://openalex.org/C175742284","wikidata":"https://www.wikidata.org/wiki/Q1415537","display_name":"Prototype filter","level":4,"score":0.5832830667495728},{"id":"https://openalex.org/C6142545","wikidata":"https://www.wikidata.org/wiki/Q1455881","display_name":"Cutoff frequency","level":2,"score":0.5664422512054443},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.5660051703453064},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.5422026515007019},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.465621680021286},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4337601065635681},{"id":"https://openalex.org/C156137958","wikidata":"https://www.wikidata.org/wiki/Q262754","display_name":"High-pass filter","level":4,"score":0.41994529962539673},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3697085678577423},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36773425340652466},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17203012108802795},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14648717641830444},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tvlsi.2015.2485302","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2485302","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-106549","is_oa":false,"landing_page_url":"https://repository.hkust.edu.hk/ir/Record/1783.1-106549","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"},{"id":"pmh:oai:repository.ust.hk:1783.1-106549","is_oa":false,"landing_page_url":"http://repository.ust.hk/ir/Record/1783.1-106549","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1535737202","https://openalex.org/W1970355389","https://openalex.org/W1985069359","https://openalex.org/W2025500963","https://openalex.org/W2026310239","https://openalex.org/W2042822758","https://openalex.org/W2073347271","https://openalex.org/W2085092712","https://openalex.org/W2094972739","https://openalex.org/W2096629108","https://openalex.org/W2097419493","https://openalex.org/W2105364622","https://openalex.org/W2107926288","https://openalex.org/W2116031583","https://openalex.org/W2129755442","https://openalex.org/W2134329906","https://openalex.org/W2136433932","https://openalex.org/W2139035764","https://openalex.org/W2142976759","https://openalex.org/W2162369617"],"related_works":["https://openalex.org/W2584353815","https://openalex.org/W2024592504","https://openalex.org/W2161289806","https://openalex.org/W3049237463","https://openalex.org/W1576752142","https://openalex.org/W2022100327","https://openalex.org/W2156114995","https://openalex.org/W173372707","https://openalex.org/W4313546953","https://openalex.org/W2051384463"],"abstract_inverted_index":{"All-pass":[0],"transformation":[1],"(APT)-based":[2],"variable":[3,48],"digital":[4],"filters":[5],"(VDFs),":[6],"also":[7,96],"known":[8],"as":[9,91],"frequency":[10,49],"warped":[11],"VDFs,":[12,149],"are":[13,31,132,155],"typically":[14],"used":[15,32],"in":[16,38,147],"various":[17],"audio":[18],"signal-processing":[19],"applications.":[20],"In":[21,65],"an":[22],"APT-based":[23,75,110,122,168],"VDF,":[24],"all-pass":[25],"filter":[26,41,45,63,160],"structures":[27],"of":[28,117,136,157],"appropriate":[29],"order":[30],"to":[33,88],"replace":[34],"the":[35,58,62,71,98,106,137,141,158,164],"delay":[36],"elements":[37],"a":[39],"prototype":[40,159],"structure.":[42],"The":[43],"resultant":[44],"can":[46],"provide":[47,84],"responses":[50],"with":[51,78],"unabridged":[52],"control":[53],"over":[54],"cutoff":[55],"frequencies":[56,153],"on":[57],"fly,":[59],"without":[60],"updating":[61],"coefficients.":[64],"this":[66],"brief,":[67],"we":[68],"briefly":[69],"review":[70],"first-":[72,107,119,165],"and":[73,83,108,120,128,166],"second-order":[74,109,121,167],"VDFs":[76],"along":[77],"their":[79],"hardware":[80,101],"implementation":[81,102,115,130,144],"architectures,":[82],"generalized":[85],"design":[86],"procedures":[87],"realize":[89],"them":[90],"per":[92],"required":[93],"specifications.":[94],"We":[95],"propose":[97],"modified":[99],"pipelined":[100,129,143],"architectures":[103,131,145],"for":[104,125,162],"both":[105,126,163],"VDFs.":[111],"Field-programmable":[112],"gate":[113],"array":[114],"results":[116,138],"different":[118],"VDF":[123,169],"designs":[124],"nonpipelined":[127],"presented.":[133],"An":[134],"analysis":[135],"shows":[139],"that":[140,154],"proposed":[142],"result":[146],"high-speed":[148],"achieving":[150],"high":[151],"operating":[152],"independent":[156],"order,":[161],"designs.":[170]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
