{"id":"https://openalex.org/W2342096460","doi":"https://doi.org/10.1109/tvlsi.2015.2469158","title":"A 57-to-64-GHz 0.094-mm<sup>2</sup>5-bit Passive Phase Shifter in 65-nm CMOS","display_name":"A 57-to-64-GHz 0.094-mm<sup>2</sup>5-bit Passive Phase Shifter in 65-nm CMOS","publication_year":2015,"publication_date":"2015-09-15","ids":{"openalex":"https://openalex.org/W2342096460","doi":"https://doi.org/10.1109/tvlsi.2015.2469158","mag":"2342096460"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2469158","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2469158","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100617044","display_name":"Fanyi Meng","orcid":"https://orcid.org/0000-0003-0989-3119"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Fanyi Meng","raw_affiliation_strings":["Center of Excellence in IC Design, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center of Excellence in IC Design, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030141198","display_name":"Kaixue Ma","orcid":"https://orcid.org/0000-0001-8657-2920"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaixue Ma","raw_affiliation_strings":["University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]},{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat Seng Yeo","raw_affiliation_strings":["Nanyang Technological University, Singapore","Singapore University of Technology and Design, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Singapore University of Technology and Design, Singapore","institution_ids":["https://openalex.org/I152815399"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101176107","display_name":"Shanshan Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Shanshan Xu","raw_affiliation_strings":["Center of Excellence in IC Design, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center of Excellence in IC Design, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.924,"has_fulltext":false,"cited_by_count":74,"citation_normalized_percentile":{"value":0.86995347,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"24","issue":"5","first_page":"1917","last_page":"1925"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10262","display_name":"Microwave Engineering and Waveguides","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10262","display_name":"Microwave Engineering and Waveguides","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10936","display_name":"Millimeter-Wave Propagation and Modeling","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-shift-module","display_name":"Phase shift module","score":0.9407534599304199},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6920793056488037},{"id":"https://openalex.org/keywords/varicap","display_name":"Varicap","score":0.6694638133049011},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5804224014282227},{"id":"https://openalex.org/keywords/insertion-loss","display_name":"Insertion loss","score":0.49493640661239624},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.49380216002464294},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48605161905288696},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.4615708589553833},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4484817087650299},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.36271169781684875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3583028316497803},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2776085436344147},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.1482696235179901}],"concepts":[{"id":"https://openalex.org/C103864889","wikidata":"https://www.wikidata.org/wiki/Q4480524","display_name":"Phase shift module","level":3,"score":0.9407534599304199},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6920793056488037},{"id":"https://openalex.org/C15485314","wikidata":"https://www.wikidata.org/wiki/Q467463","display_name":"Varicap","level":4,"score":0.6694638133049011},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5804224014282227},{"id":"https://openalex.org/C90327742","wikidata":"https://www.wikidata.org/wiki/Q947396","display_name":"Insertion loss","level":2,"score":0.49493640661239624},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.49380216002464294},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48605161905288696},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.4615708589553833},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4484817087650299},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.36271169781684875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3583028316497803},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2776085436344147},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.1482696235179901},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2469158","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2469158","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1993610307","https://openalex.org/W1997146307","https://openalex.org/W1997560463","https://openalex.org/W2023929065","https://openalex.org/W2040973627","https://openalex.org/W2045015276","https://openalex.org/W2048292302","https://openalex.org/W2110178592","https://openalex.org/W2112481448","https://openalex.org/W2121133871","https://openalex.org/W2125019598","https://openalex.org/W2131556268","https://openalex.org/W2138134014","https://openalex.org/W2149301758","https://openalex.org/W2153526318","https://openalex.org/W2162895919","https://openalex.org/W4248442642","https://openalex.org/W6661974235","https://openalex.org/W6678362854","https://openalex.org/W6680742618","https://openalex.org/W6682642496"],"related_works":["https://openalex.org/W2010723185","https://openalex.org/W2144104913","https://openalex.org/W2907727549","https://openalex.org/W4297802329","https://openalex.org/W2620757316","https://openalex.org/W1964195796","https://openalex.org/W2162777215","https://openalex.org/W1974354176","https://openalex.org/W2144698267","https://openalex.org/W2093562701"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,31,52,61,128,135,140,146,155],"design":[4,53],"of":[5,85,99,105,114,122,131,137,148],"a":[6,13,46,72,101],"compact":[7],"60-GHz":[8,64],"phase":[9,16,20,26,67,80,87,97,143,159],"shifter":[10,27,81,144,160],"that":[11],"provides":[12],"5-bit":[14,65,157],"digital":[15],"control":[17],"and":[18,37,57,127],"360\u00b0":[19,66,79,142],"range":[21],"for":[22],"beam-forming":[23],"systems.":[24],"The":[25,41,77],"is":[28,154],"designed":[29,70,141],"using":[30,45],"proposed":[32],"cross-coupled":[33],"bridged":[34],"T-type":[35],"topology":[36],"switched-varactor":[38],"reflective-type":[39],"topology.":[40],"topologies":[42],"are":[43,55,69],"analyzed":[44],"small-signal":[47],"equivalent":[48],"circuit":[49],"model.":[50],"Furthermore,":[51],"equations":[54],"derived":[56],"investigated.":[58],"To":[59,134],"validate":[60],"theoretical":[62],"analysis,":[63],"shifters":[68],"in":[71],"commercial":[73],"65-nm":[74],"CMOS":[75],"technology.":[76],"fabricated":[78],"features":[82],"good":[83],"performance":[84],"32":[86],"states":[88],"from":[89],"57":[90],"to":[91],"64":[92],"GHz":[93],"with":[94,145],"an":[95,110],"rms":[96,111],"error":[98,113],"4.4\u00b0,":[100],"total":[102],"insertion":[103],"loss":[104],"14.3":[106],"\u00b1":[107],"2":[108],"dB,":[109,116],"gain":[112],"0.5":[115],"P":[117],"<sub":[118],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[119,152],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">1</sub>":[120],"dB":[121],"better":[123],"than":[124],"9.5":[125],"dBm,":[126],"power":[129],"consumption":[130],"almost":[132],"zero.":[133],"best":[136],"our":[138],"knowledge,":[139],"size":[147],"0.094":[149],"mm":[150],"<sup":[151],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[153],"smallest":[156],"passive":[158],"at":[161],"frequencies":[162],"around":[163],"60":[164],"GHz.":[165]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":11},{"year":2022,"cited_by_count":10},{"year":2021,"cited_by_count":9},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":2}],"updated_date":"2026-07-15T18:14:33.161393","created_date":"2025-10-10T00:00:00"}
