{"id":"https://openalex.org/W2307911067","doi":"https://doi.org/10.1109/tvlsi.2015.2464092","title":"A 520k (18900, 17010) Array Dispersion LDPC Decoder Architectures for NAND Flash Memory","display_name":"A 520k (18900, 17010) Array Dispersion LDPC Decoder Architectures for NAND Flash Memory","publication_year":2015,"publication_date":"2015-08-18","ids":{"openalex":"https://openalex.org/W2307911067","doi":"https://doi.org/10.1109/tvlsi.2015.2464092","mag":"2307911067"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2464092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2464092","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056778609","display_name":"Kin-Chu Ho","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Kin-Chu Ho","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066421942","display_name":"Chih-Lung Chen","orcid":"https://orcid.org/0000-0001-6059-9869"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Lung Chen","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074752759","display_name":"Hsie-Chia Chang","orcid":"https://orcid.org/0000-0002-0525-8129"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsie-Chia Chang","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5056778609"],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":6.6678,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.97047861,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"24","issue":"4","first_page":"1293","last_page":"1304"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.8241448402404785},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6716386079788208},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5115295648574829},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5086382627487183},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.49988603591918945},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.49592694640159607},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4366976022720337},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34734663367271423}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.8241448402404785},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6716386079788208},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5115295648574829},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5086382627487183},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.49988603591918945},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.49592694640159607},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4366976022720337},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34734663367271423}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2464092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2464092","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3895107263","display_name":null,"funder_award_id":"NSC 101-2628-E-009-013-MY3","funder_id":"https://openalex.org/F4320321040","funder_display_name":"National Science Council"}],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"},{"id":"https://openalex.org/F4320323443","display_name":"National Chiao Tung University","ror":"https://ror.org/00se2k293"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W628021441","https://openalex.org/W1484692004","https://openalex.org/W1569612250","https://openalex.org/W1572884776","https://openalex.org/W1973672456","https://openalex.org/W1997109189","https://openalex.org/W2046091144","https://openalex.org/W2048185145","https://openalex.org/W2053979825","https://openalex.org/W2056055289","https://openalex.org/W2064435670","https://openalex.org/W2067501233","https://openalex.org/W2067949454","https://openalex.org/W2081471788","https://openalex.org/W2083774980","https://openalex.org/W2090993682","https://openalex.org/W2099643334","https://openalex.org/W2100387211","https://openalex.org/W2113420173","https://openalex.org/W2122079707","https://openalex.org/W2123530431","https://openalex.org/W2126419525","https://openalex.org/W2127002303","https://openalex.org/W2127432030","https://openalex.org/W2128765501","https://openalex.org/W2134523634","https://openalex.org/W2135764410","https://openalex.org/W2139164285","https://openalex.org/W2139645268","https://openalex.org/W2142321576","https://openalex.org/W2164457883","https://openalex.org/W4256264271","https://openalex.org/W4285719527","https://openalex.org/W6628810906","https://openalex.org/W6663996228","https://openalex.org/W6664502049","https://openalex.org/W6667438920","https://openalex.org/W6673043445"],"related_works":["https://openalex.org/W2903058006","https://openalex.org/W2102374550","https://openalex.org/W2047069332","https://openalex.org/W2352157218","https://openalex.org/W4213381250","https://openalex.org/W4225319325","https://openalex.org/W2980068837","https://openalex.org/W2124455219","https://openalex.org/W2098872742","https://openalex.org/W2109390513"],"abstract_inverted_index":{"Although":[0],"Latin":[1],"square":[2],"is":[3,80,87,104,178,191,214],"a":[4,29,57,95,125,134,169,232,241,247],"well-known":[5],"algorithm":[6,86,213],"to":[7,74,89,109,133,195],"construct":[8,90],"low-density":[9],"parity-check":[10,130],"(LDPC)":[11],"codes":[12,93,123],"for":[13,152,159],"satisfying":[14],"long":[15,91],"code":[16,66,103,167],"length,":[17],"high":[18,153],"code-rate,":[19],"good":[20],"correcting":[21],"capability,":[22],"and":[23,45,68,116,147,173,180,269],"low":[24],"error":[25,189],"floor,":[26],"it":[27],"has":[28,140],"drawback":[30],"of":[31,143,171,176,197,234,244,250,258],"large":[32,42,148],"submatrix":[33,97,174],"that":[34,187,225],"the":[35,77,100,129,141,181,188,226,255],"hardware":[36,72],"implementation":[37,73],"will":[38],"be":[39,157],"suffered":[40],"from":[41],"barrel":[43],"shifter":[44],"worse":[46],"routing":[47],"congestion":[48],"in":[49,128,216],"fitting":[50],"NAND":[51,160,260,271,275],"flash":[52,161,261,272],"applications.":[53],"In":[54,119],"this":[55],"paper,":[56],"top-down":[58],"design":[59],"methodology,":[60],"which":[61,139],"not":[62],"only":[63],"goes":[64],"through":[65],"construction":[67],"optimization,":[69],"but":[70],"also":[71],"meet":[75],"all":[76],"critical":[78],"requirements,":[79],"presented.":[81],"A":[82],"two-step":[83],"array":[84,184],"dispersion":[85],"proposed":[88,135,227],"LDPC":[92,102,122,166,204,228],"with":[94,168,240,263],"small":[96],"size.":[98],"Then,":[99],"constructed":[101,179],"optimized":[105],"by":[106],"masking":[107],"matrix":[108,131],"obtain":[110],"better":[111,144],"bit-error":[112],"rate":[113,267],"(BER)":[114],"performance":[115],"lower":[117],"error-floor.":[118],"addition,":[120],"our":[121],"have":[124],"diagonal-like":[126],"structure":[127],"leading":[132],"hybrid":[136],"storage":[137],"architecture,":[138],"advantages":[142],"area":[145],"efficiency":[146],"enough":[149],"data":[150,266],"bandwidth":[151],"decoding":[154,212],"throughput.":[155],"To":[156],"adopted":[158],"applications,":[162],"an":[163],"(18900,":[164],"17010)":[165],"code-rate":[170],"0.9":[172],"size":[175],"63":[177],"field-programmable":[182],"gate":[183,242],"simulations":[185],"show":[186],"floor":[190],"successfully":[192],"suppressed":[193],"down":[194],"BER":[196],"10":[198],"<sup":[199],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[200],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-12</sup>":[201],".":[202],"An":[203],"decoder":[205,229],"using":[206],"normalized":[207],"min-sum":[208],"variable-node-centric":[209],"sequential":[210],"scheduling":[211],"implemented":[215],"UMC":[217],"90-nm":[218],"CMOS":[219],"process.":[220],"The":[221],"postlayout":[222],"result":[223],"shows":[224],"can":[230],"achieve":[231],"throughput":[233,256],"1.58":[235],"Gb/s":[236],"at":[237],"six":[238],"iterations":[239],"count":[243],"520k":[245],"under":[246],"clock":[248],"frequency":[249],"166.6":[251],"MHz.":[252],"It":[253],"meets":[254],"requirement":[257],"both":[259],"memories":[262],"Toggle":[264],"double":[265],"1.0":[268],"open":[270],"interface":[273],"2.3":[274],"interfaces.":[276]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":10},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":4}],"updated_date":"2026-03-13T16:22:10.518609","created_date":"2025-10-10T00:00:00"}