{"id":"https://openalex.org/W2309308791","doi":"https://doi.org/10.1109/tvlsi.2015.2462752","title":"A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing","display_name":"A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing","publication_year":2015,"publication_date":"2015-08-27","ids":{"openalex":"https://openalex.org/W2309308791","doi":"https://doi.org/10.1109/tvlsi.2015.2462752","mag":"2309308791"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2462752","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2462752","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054524841","display_name":"Shouyi Yin","orcid":"https://orcid.org/0000-0003-2309-572X"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shouyi Yin","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086894201","display_name":"Peng Ouyang","orcid":"https://orcid.org/0000-0001-6598-3472"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peng Ouyang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110327044","display_name":"Tianbao Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianbao Chen","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100358856","display_name":"Leibo Liu","orcid":"https://orcid.org/0000-0001-7548-4116"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Leibo Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036023084","display_name":"Shaojun Wei","orcid":"https://orcid.org/0000-0001-5117-7920"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shaojun Wei","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9483,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.8162092,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"24","issue":"4","first_page":"1305","last_page":"1318"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10191","display_name":"Robotics and Sensor-Based Localization","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2202","display_name":"Aerospace Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/histogram","display_name":"Histogram","score":0.7648207545280457},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7195168137550354},{"id":"https://openalex.org/keywords/computing-with-memory","display_name":"Computing with Memory","score":0.5402324795722961},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47478291392326355},{"id":"https://openalex.org/keywords/data-redundancy","display_name":"Data redundancy","score":0.4507463276386261},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.4477161467075348},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4120580554008484},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3578307032585144},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.25678014755249023},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.22658470273017883},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.21780523657798767},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.19656670093536377},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.07945013046264648},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.07055103778839111}],"concepts":[{"id":"https://openalex.org/C53533937","wikidata":"https://www.wikidata.org/wiki/Q185020","display_name":"Histogram","level":3,"score":0.7648207545280457},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7195168137550354},{"id":"https://openalex.org/C152890283","wikidata":"https://www.wikidata.org/wiki/Q4129922","display_name":"Computing with Memory","level":5,"score":0.5402324795722961},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47478291392326355},{"id":"https://openalex.org/C7545210","wikidata":"https://www.wikidata.org/wiki/Q838123","display_name":"Data redundancy","level":2,"score":0.4507463276386261},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.4477161467075348},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4120580554008484},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3578307032585144},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.25678014755249023},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.22658470273017883},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.21780523657798767},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.19656670093536377},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.07945013046264648},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.07055103778839111},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2462752","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2462752","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G3907330648","display_name":null,"funder_award_id":"61274131","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W92574275","https://openalex.org/W269715775","https://openalex.org/W1527240141","https://openalex.org/W1608462934","https://openalex.org/W1965877721","https://openalex.org/W1990537966","https://openalex.org/W2003220250","https://openalex.org/W2021586009","https://openalex.org/W2025737663","https://openalex.org/W2039551633","https://openalex.org/W2046399019","https://openalex.org/W2047565542","https://openalex.org/W2096119182","https://openalex.org/W2098314020","https://openalex.org/W2110241600","https://openalex.org/W2116850896","https://openalex.org/W2121647436","https://openalex.org/W2121846372","https://openalex.org/W2123472193","https://openalex.org/W2140273727","https://openalex.org/W2143425433","https://openalex.org/W2149077040","https://openalex.org/W2151103935","https://openalex.org/W2151213737","https://openalex.org/W2161106546","https://openalex.org/W2161969291","https://openalex.org/W2217896605","https://openalex.org/W2544130530","https://openalex.org/W3097096317","https://openalex.org/W4253999777","https://openalex.org/W6631618440","https://openalex.org/W6674865934"],"related_works":["https://openalex.org/W2002428578","https://openalex.org/W2897258045","https://openalex.org/W2018406690","https://openalex.org/W2072332896","https://openalex.org/W2951748633","https://openalex.org/W2542042335","https://openalex.org/W4292309272","https://openalex.org/W2057691131","https://openalex.org/W2952039693","https://openalex.org/W4280621979"],"abstract_inverted_index":{"Integral":[0],"histogram":[1,53,83,110,116],"image":[2,57,59],"can":[3],"accelerate":[4],"the":[5,34,42,46,72,81,96,105,115,121,125,152,165],"computing":[6,35,154],"process":[7],"of":[8,37,71,108,132],"feature":[9],"algorithm":[10],"in":[11,45,88,93,124],"computer":[12],"vision,":[13],"but":[14],"exhibits":[15],"high":[16,160],"computation":[17],"complexity":[18],"and":[19,61,128,143],"inefficient":[20],"memory":[21,75,100,111,133],"access.":[22],"In":[23],"this":[24,78,94],"paper,":[25],"we":[26],"propose":[27],"a":[28,89,130],"configurable":[29,43],"parallel":[30],"architecture":[31,79,150],"to":[32],"improve":[33],"efficiency":[36,162],"integral":[38,49,52,82,109,126],"histogram.":[39],"Based":[40],"on":[41],"design":[44],"architecture,":[47,95],"multiple":[48],"objects":[50],"for":[51],"image,":[54],"such":[55],"as":[56],"intensity,":[58],"gradient,":[60],"local":[62],"binary":[63],"pattern,":[64],"are":[65],"well":[66],"supported.":[67],"Meanwhile,":[68],"by":[69,113,156],"means":[70],"proposed":[73,97],"strip-based":[74],"partitioning":[76],"mechanism,":[77],"processes":[80],"quickly":[84],"with":[85,159,164],"maximal":[86],"parallelism":[87],"pipeline":[90],"manner.":[91],"Besides,":[92],"data":[98,122],"correlation":[99],"compression":[101],"mechanism":[102],"effectively":[103],"solves":[104],"expansion":[106],"problem":[107],"caused":[112],"storing":[114],"data.":[117],"It":[118],"fully":[119],"reduces":[120],"redundancy":[123],"histograms,":[127],"saves":[129],"lot":[131],"resources.":[134],"Experiments":[135],"using":[136],"Cyclone":[137],"IV-based":[138],"field-programmable":[139],"gate":[140],"array":[141],"platform":[142],"65-nm":[144],"technology-based":[145],"postsynthesis":[146],"show":[147],"that":[148],"our":[149],"improves":[151],"average":[153],"speed":[155],"8.6":[157],"times":[158],"power":[161],"compared":[163],"state-of-the-art":[166],"works.":[167]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}