{"id":"https://openalex.org/W2290777953","doi":"https://doi.org/10.1109/tvlsi.2015.2447001","title":"A Low-Power and Highly Linear 14-bit Parallel Sampling TDC With Power Gating and DEM in 65-nm CMOS","display_name":"A Low-Power and Highly Linear 14-bit Parallel Sampling TDC With Power Gating and DEM in 65-nm CMOS","publication_year":2015,"publication_date":"2015-07-17","ids":{"openalex":"https://openalex.org/W2290777953","doi":"https://doi.org/10.1109/tvlsi.2015.2447001","mag":"2290777953"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2447001","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2447001","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088522915","display_name":"Supeng Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Supeng Liu","raw_affiliation_strings":["VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016044907","display_name":"Yuanjin Zheng","orcid":"https://orcid.org/0000-0002-5768-367X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yuanjin Zheng","raw_affiliation_strings":["VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088522915"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":1.381,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.84057635,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"24","issue":"3","first_page":"1083","last_page":"1091"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.8467000722885132},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6729872822761536},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.568391740322113},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5281755328178406},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4546507000923157},{"id":"https://openalex.org/keywords/delay-line-oscillator","display_name":"Delay line oscillator","score":0.4276086688041687},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.41793158650398254},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4131448268890381},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.34926891326904297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3322761356830597},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2796868681907654},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.22505995631217957},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21912690997123718},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.21075519919395447},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.19050273299217224},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.16687750816345215}],"concepts":[{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.8467000722885132},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6729872822761536},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.568391740322113},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5281755328178406},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4546507000923157},{"id":"https://openalex.org/C26907483","wikidata":"https://www.wikidata.org/wiki/Q5253479","display_name":"Delay line oscillator","level":4,"score":0.4276086688041687},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.41793158650398254},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4131448268890381},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34926891326904297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3322761356830597},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2796868681907654},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.22505995631217957},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21912690997123718},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.21075519919395447},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.19050273299217224},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.16687750816345215}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2447001","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2447001","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1509148781","https://openalex.org/W1589093285","https://openalex.org/W1766519476","https://openalex.org/W1972578932","https://openalex.org/W1975105067","https://openalex.org/W1978745798","https://openalex.org/W2034078593","https://openalex.org/W2065992070","https://openalex.org/W2078312526","https://openalex.org/W2086336002","https://openalex.org/W2096434843","https://openalex.org/W2098329558","https://openalex.org/W2108435403","https://openalex.org/W2120912680","https://openalex.org/W2126886945","https://openalex.org/W2130227819","https://openalex.org/W2136657726","https://openalex.org/W2139053608","https://openalex.org/W2142629786","https://openalex.org/W2151659230","https://openalex.org/W2172061240","https://openalex.org/W2212877209","https://openalex.org/W6680712959"],"related_works":["https://openalex.org/W2290610940","https://openalex.org/W2147061220","https://openalex.org/W1968317383","https://openalex.org/W2904471745","https://openalex.org/W2094831168","https://openalex.org/W2796345361","https://openalex.org/W2120895593","https://openalex.org/W2972949608","https://openalex.org/W1483788022","https://openalex.org/W4211122635"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"time-to-digital":[3],"converter":[4],"(TDC)":[5],"architecture":[6],"capable":[7],"of":[8,61,170,178,215,224],"achieving":[9],"subgate-delay":[10],"resolution":[11,49],"and":[12,38,137,146,159,205,210],"large":[13],"detection":[14,176],"range":[15,177],"at":[16,196],"the":[17,47,53,71,87,97,104,123,129,133,171,216],"same":[18],"time":[19,48,73,121],"with":[20,35,181],"low":[21,77],"power":[22,36,78,192],"consumption.":[23,79],"The":[24,64,151,201],"proposed":[25],"TDC":[26],"is":[27,50,67,101,107,153],"based":[28],"on":[29],"a":[30,93,161,175,189,197,221],"parallel":[31],"sampling":[32,58,199],"ring":[33,65,88,98,124],"oscillator":[34,66,89,99,125],"gating":[37],"dynamic":[39],"element":[40],"matching":[41],"(DEM).":[42],"Through":[43],"digital":[44],"background":[45],"calibration,":[46],"determined":[51],"by":[52,109],"delay":[54],"difference":[55],"between":[56],"successive":[57],"clocks":[59],"instead":[60],"buffer":[62,82,130,148],"delay.":[63],"enabled":[68],"only":[69],"during":[70],"incoming":[72,120],"pulsewidth,":[74],"leading":[75],"to":[76,90,92,112,115],"A":[80],"new":[81],"circuit":[83],"implementation":[84],"which":[85,132],"enables":[86],"settle":[91],"known":[94],"position":[95,106],"after":[96],"stops":[100],"proposed.":[102],"Furthermore,":[103],"stop":[105],"latched":[108],"cross-coupled":[110],"inverters":[111],"achieve":[113],"immunity":[114],"leakage":[116],"issues.":[117],"For":[118],"each":[119],"pulse,":[122],"starts":[126],"oscillation":[127],"from":[128,188],"before":[131],"previous":[134],"conversion":[135],"stops,":[136],"thus,":[138],"it":[139],"also":[140,219],"achieves":[141],"barrel-shift":[142],"algorithm":[143],"for":[144],"DEM":[145],"mitigates":[147],"mismatch":[149],"impact.":[150],"design":[152],"fabricated":[154],"in":[155],"65-nm":[156],"CMOS":[157],"technology":[158],"occupies":[160],"0.4":[162],"mm":[163,166],"\u00d7":[164],"0.3":[165],"chip":[167],"area.":[168],"Measurements":[169,214],"prototype":[172,217],"IC":[173,218],"demonstrate":[174,220],"98":[179],"ns":[180],"6":[182],"ps/LSB.":[183],"It":[184],"consumes":[185],"280":[186],"\u03bcW":[187],"1.2":[190],"V":[191],"supply":[193],"when":[194],"operating":[195],"1-MS/s":[198],"rate.":[200],"measured":[202],"integral":[203],"nonlinearity":[204,207],"differential":[206],"are":[208],"0.5":[209],"0.1":[211],"LSB,":[212],"respectively.":[213],"single-shot":[222],"precision":[223],"less":[225],"than":[226],"11":[227],"ps.":[228]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
