{"id":"https://openalex.org/W2284377722","doi":"https://doi.org/10.1109/tvlsi.2015.2426113","title":"Ultralow-Energy Variation-Aware Design: Adder Architecture Study","display_name":"Ultralow-Energy Variation-Aware Design: Adder Architecture Study","publication_year":2015,"publication_date":"2015-05-21","ids":{"openalex":"https://openalex.org/W2284377722","doi":"https://doi.org/10.1109/tvlsi.2015.2426113","mag":"2284377722"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2426113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2426113","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085421646","display_name":"H. Dorosti","orcid":"https://orcid.org/0000-0001-6554-1607"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Hamed Dorosti","raw_affiliation_strings":["Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109526331","display_name":"Ali Teymouri","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Ali Teymouri","raw_affiliation_strings":["Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109197901","display_name":"Sied Mehdi Fakhraie","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Sied Mehdi Fakhraie","raw_affiliation_strings":["Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085185979","display_name":"Mostafa E. Salehi","orcid":"https://orcid.org/0000-0003-1733-6056"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mostafa E. Salehi","raw_affiliation_strings":["Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Nano-Electronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5085421646"],"corresponding_institution_ids":["https://openalex.org/I23946033"],"apc_list":null,"apc_paid":null,"fwci":0.4004,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.68600493,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"24","issue":"3","first_page":"1165","last_page":"1168"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.7528865337371826},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7492721080780029},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.7150677442550659},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.6516594886779785},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6062772274017334},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5412362217903137},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.47828635573387146},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.43449386954307556},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.4290464520454407},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4096483290195465},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.405370831489563},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3902600407600403},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3018952012062073},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11623314023017883}],"concepts":[{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.7528865337371826},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7492721080780029},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7150677442550659},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.6516594886779785},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6062772274017334},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5412362217903137},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.47828635573387146},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.43449386954307556},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.4290464520454407},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4096483290195465},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.405370831489563},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3902600407600403},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3018952012062073},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11623314023017883},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2426113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2426113","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W246882494","https://openalex.org/W612784192","https://openalex.org/W649475307","https://openalex.org/W1584008964","https://openalex.org/W1988534568","https://openalex.org/W1994266431","https://openalex.org/W2031805653","https://openalex.org/W2044358145","https://openalex.org/W2076404185","https://openalex.org/W2095858451","https://openalex.org/W2114668191","https://openalex.org/W2115224472","https://openalex.org/W2150283124","https://openalex.org/W2157204696","https://openalex.org/W2170335526","https://openalex.org/W2538518892","https://openalex.org/W4210830821","https://openalex.org/W4403724184"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2300671402","https://openalex.org/W1993041309","https://openalex.org/W4312888585","https://openalex.org/W2015155483"],"abstract_inverted_index":{"Power":[0],"consumption":[1],"of":[2,14,34,78,115],"digital":[3],"systems":[4],"is":[5,154],"an":[6],"important":[7],"issue":[8],"in":[9,66,89,158],"nanoscale":[10],"technologies":[11,88],"and":[12,32,46,58,82,110],"growth":[13],"process":[15,35,64,152],"variation":[16,36,65,116],"makes":[17],"the":[18,28,43,145],"problem":[19],"more":[20],"challenging.":[21],"In":[22,118],"this":[23],"brief,":[24],"we":[25],"have":[26,72,106],"analyzed":[27],"latency,":[29],"energy":[30,56,108],"consumption,":[31,57],"effects":[33],"on":[37],"different":[38,76],"structures":[39],"with":[40,52],"respect":[41],"to":[42,49,94,143,151],"design":[44],"structure":[45],"logic":[47],"depth":[48],"propose":[50,83],"architectures":[51],"higher":[53],"throughput,":[54],"lower":[55],"smaller":[59,102],"performance":[60,112],"loss":[61,147],"caused":[62],"by":[63],"application-specific":[67],"integrated":[68],"circuit":[69],"design.":[70],"We":[71],"exploited":[73],"adders":[74],"as":[75,132],"implementations":[77],"a":[79],"processing":[80],"unit,":[81],"architectural":[84],"guidelines":[85],"for":[86],"finer":[87],"subthreshold":[90],"which":[91],"are":[92,137],"applicable":[93],"any":[95],"other":[96],"architecture.":[97],"The":[98],"results":[99],"show":[100],"that":[101],"computing":[103],"building":[104],"blocks":[105],"better":[107],"efficiency":[109],"less":[111,127],"degradation":[113],"because":[114],"effects.":[117],"contrast,":[119],"their":[120],"computation":[121],"throughput":[122,146],"will":[123],"be":[124],"mid":[125],"or":[126,134,162],"unless":[128],"proper":[129],"solutions,":[130],"such":[131],"pipelined":[133,160],"parallel":[135,164],"structures,":[136],"used.":[138],"Therefore,":[139],"our":[140],"proposed":[141],"solution":[142],"improve":[144],"while":[148],"reducing":[149],"sensitivity":[150],"variations":[153],"using":[155],"simpler":[156],"elements":[157],"deep":[159],"designs":[161],"massively":[163],"structures.":[165]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
