{"id":"https://openalex.org/W2291356006","doi":"https://doi.org/10.1109/tvlsi.2015.2425653","title":"Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames","display_name":"Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames","publication_year":2015,"publication_date":"2015-05-08","ids":{"openalex":"https://openalex.org/W2291356006","doi":"https://doi.org/10.1109/tvlsi.2015.2425653","mag":"2291356006"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2015.2425653","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2425653","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110517906","display_name":"Mojtaba Ebrahimi","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mojtaba Ebrahimi","raw_affiliation_strings":["Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071119931","display_name":"Parthasarathy M. B. Rao","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Parthasarathy Murali B. Rao","raw_affiliation_strings":["Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091212074","display_name":"Razi Seyyedi","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Razi Seyyedi","raw_affiliation_strings":["Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064445713","display_name":"Mehdi B. Tahoori","orcid":"https://orcid.org/0000-0002-8829-5610"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi B. Tahoori","raw_affiliation_strings":["Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair of Dependable and Nano Computing, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":2.721,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.91175388,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"24","issue":"3","first_page":"932","last_page":"943"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.804540753364563},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6887359023094177},{"id":"https://openalex.org/keywords/upset","display_name":"Upset","score":0.6375133395195007},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6327966451644897},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5567521452903748},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.5063453912734985},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.47701120376586914},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4668574631214142},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45582446455955505},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4556262493133545},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.4275780916213989},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4266640543937683},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14248979091644287},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13839465379714966},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09540042281150818},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08409097790718079}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.804540753364563},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6887359023094177},{"id":"https://openalex.org/C2778002589","wikidata":"https://www.wikidata.org/wiki/Q2406791","display_name":"Upset","level":2,"score":0.6375133395195007},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6327966451644897},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5567521452903748},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.5063453912734985},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.47701120376586914},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4668574631214142},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45582446455955505},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4556262493133545},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.4275780916213989},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4266640543937683},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14248979091644287},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13839465379714966},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09540042281150818},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08409097790718079},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2015.2425653","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2015.2425653","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.49000000953674316,"display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W1527974875","https://openalex.org/W1535801681","https://openalex.org/W1971631990","https://openalex.org/W1975904133","https://openalex.org/W1986722376","https://openalex.org/W2007310349","https://openalex.org/W2009950553","https://openalex.org/W2020872704","https://openalex.org/W2039915451","https://openalex.org/W2041975312","https://openalex.org/W2044586990","https://openalex.org/W2070280483","https://openalex.org/W2072397237","https://openalex.org/W2087347065","https://openalex.org/W2095967702","https://openalex.org/W2099760530","https://openalex.org/W2104886115","https://openalex.org/W2106281713","https://openalex.org/W2111349121","https://openalex.org/W2120933974","https://openalex.org/W2126082910","https://openalex.org/W2130533683","https://openalex.org/W2132865476","https://openalex.org/W2138815251","https://openalex.org/W2149288978","https://openalex.org/W2151529344","https://openalex.org/W2153224608","https://openalex.org/W2157447136","https://openalex.org/W2167839483","https://openalex.org/W2168159483","https://openalex.org/W2182039723","https://openalex.org/W2185926888","https://openalex.org/W2498844334","https://openalex.org/W3142488006","https://openalex.org/W4229741704","https://openalex.org/W4231535434","https://openalex.org/W4236024374","https://openalex.org/W4285719527","https://openalex.org/W6686010745","https://openalex.org/W6686479381"],"related_works":["https://openalex.org/W2028180791","https://openalex.org/W607682241","https://openalex.org/W320153218","https://openalex.org/W2352434195","https://openalex.org/W2619155","https://openalex.org/W2361293896","https://openalex.org/W2051386096","https://openalex.org/W2166965937","https://openalex.org/W3208260600","https://openalex.org/W2143818680"],"abstract_inverted_index":{"Radiation-induced":[0],"multiple":[1],"bit":[2],"upsets":[3],"(MBUs)":[4],"are":[5],"a":[6,23,42,54,78,91,126],"major":[7],"reliability":[8],"concern":[9],"in":[10,18,70,85,141],"nanoscale":[11],"technology":[12],"nodes.":[13],"Occurrence":[14],"of":[15,22,33,105,121,139],"such":[16,53],"errors":[17],"the":[19,31,34,97,103,117,122,133,142,151,157],"configuration":[20,38,71,86,99,143],"frames":[21,87,144],"field-programmable":[24],"gate":[25],"array":[26],"(FPGA)":[27],"device":[28,130],"permanently":[29],"affects":[30],"functionality":[32],"mapped":[35],"design.":[36],"Periodic":[37],"scrubbing":[39,93],"combined":[40],"with":[41,63,145,156],"low-cost":[43,79],"error":[44,60],"correction":[45,61],"scheme":[46,94,110,124,135],"is":[47,154],"an":[48],"efficient":[49],"approach":[50],"to":[51,67,82,95,116],"avoid":[52],"permanent":[55],"effect.":[56],"Existing":[57],"techniques":[58],"employ":[59],"codes":[62],"considerably":[64],"high":[65],"overhead":[66],"mitigate":[68],"MBUs":[69,84,140],"frames.":[72],"In":[73],"this":[74],"paper,":[75],"we":[76],"present":[77],"error-detection":[80],"code":[81],"detect":[83,137],"as":[88,90],"well":[89],"generic":[92],"reconstruct":[96],"erroneous":[98],"frame":[100],"based":[101],"on":[102,125],"concept":[104],"erasure":[106],"codes.":[107],"The":[108],"proposed":[109,123,134],"does":[111],"not":[112],"require":[113],"any":[114],"modification":[115],"FPGA":[118,129],"architecture.":[119],"Implementation":[120],"Xilinx":[127],"Virtex-6":[128],"shows":[131],"that":[132],"can":[136],"100%":[138],"only":[146],"3.3%":[147],"resource":[148],"occupation,":[149],"while":[150],"recovery":[152],"time":[153],"comparable":[155],"previous":[158],"schemes.":[159]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}