{"id":"https://openalex.org/W1982448920","doi":"https://doi.org/10.1109/tvlsi.2014.2364785","title":"Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths","display_name":"Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths","publication_year":2014,"publication_date":"2014-11-07","ids":{"openalex":"https://openalex.org/W1982448920","doi":"https://doi.org/10.1109/tvlsi.2014.2364785","mag":"1982448920"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2014.2364785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2364785","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110232217","display_name":"Xiaobin Yuan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiaobin Yuan","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014616887","display_name":"Pawel Owczarczyk","orcid":"https://orcid.org/0000-0003-1380-9258"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pawel Owczarczyk","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009645584","display_name":"Alan J. Drake","orcid":null},"institutions":[{"id":"https://openalex.org/I1334877674","display_name":"Taiwan Semiconductor Manufacturing Company (United States)","ror":"https://ror.org/02rvfjx92","country_code":"US","type":"company","lineage":["https://openalex.org/I1334877674","https://openalex.org/I4210120917"]},{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alan J. Drake","raw_affiliation_strings":["IBM Research-Austin, Austin, TX, USA","TSMC North America, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"TSMC North America, Austin, TX, USA","institution_ids":["https://openalex.org/I1334877674"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020568431","display_name":"Marshall D. Tiner","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Marshall D. Tiner","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007004126","display_name":"David Hui","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"David T. Hui","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026853122","display_name":"John P. Pennings","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"John P. Pennings","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084399864","display_name":"Francesco A. Campisano","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Francesco A. Campisano","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018245672","display_name":"Richard L. Willaman","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Richard L. Willaman","raw_affiliation_strings":["IBM Systems and Technology Group, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018849079","display_name":"L.M. Cropp","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Leana M. Cropp","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011128775","display_name":"Rudolph D. Dussault","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rudolph D. Dussault","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4144,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65766697,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"23","issue":"11","first_page":"2714","last_page":"2718"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6487506628036499},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5602926015853882},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5600019097328186},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49419882893562317},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48254603147506714},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3226395845413208},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31234872341156006},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1920364797115326}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6487506628036499},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5602926015853882},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5600019097328186},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49419882893562317},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48254603147506714},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3226395845413208},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31234872341156006},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1920364797115326}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2014.2364785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2364785","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1911029421","https://openalex.org/W1981384041","https://openalex.org/W1981411441","https://openalex.org/W1996470876","https://openalex.org/W2028791936","https://openalex.org/W2079269230","https://openalex.org/W2079706534","https://openalex.org/W2094477153","https://openalex.org/W2101597431","https://openalex.org/W2110456332","https://openalex.org/W2151943723","https://openalex.org/W4236722794","https://openalex.org/W6640006728","https://openalex.org/W6670518604"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W39373273","https://openalex.org/W3014521742","https://openalex.org/W2098026815","https://openalex.org/W2390545901","https://openalex.org/W2351709090","https://openalex.org/W2735012529","https://openalex.org/W2732121450","https://openalex.org/W2109445684","https://openalex.org/W2081082331"],"abstract_inverted_index":{"The":[0,21,55,78,107],"design,":[1],"analysis,":[2],"and":[3,43,93],"implementation":[4],"of":[5,40,70,83,87,101,151],"an":[6,146],"accurate":[7],"delay":[8,22,30,46,50,57,60,89],"circuit":[9,23,90,109,139],"used":[10],"to":[11,52],"synthesize":[12],"critical":[13,114],"paths":[14],"in":[15,62,104],"a":[16,25,37,44,120,157],"microprocessor":[17,103,122,141],"system":[18],"are":[19],"presented.":[20],"includes":[24],"novel":[26],"64-step":[27],"programmable":[28],"calibration":[29,56],"line":[31,58],"that":[32,137],"is":[33,66,81,110],"highly":[34],"uniform":[35],"across":[36],"wide":[38,158],"range":[39],"supply":[41,159],"voltages":[42],"reconfigurable":[45,79],"path":[47,80,115],"with":[48,145],"tunable":[49],"sensitivity":[51,86],"voltage":[53,85,99,160],"variations.":[54],"generates":[59],"step":[61],"picosecond":[63],"range,":[64],"which":[65],"less":[67,148],"than":[68,149],"1%":[69],"the":[71,76,88,95,102,113,138,152],"clock":[72],"cycle":[73],"time":[74],"for":[75],"microprocessor.":[77],"capable":[82],"increasing":[84],"by":[91],"40%":[92],"emulating":[94],"steeper":[96],"frequency":[97,155],"versus":[98],"slope":[100],"low-voltage":[105],"domain.":[106],"proposed":[108],"implemented":[111],"inside":[112],"monitor":[116],"block":[117],"placed":[118],"on":[119],"test":[121,134],"core":[123,153],"fabricated":[124],"using":[125],"22-nm":[126],"silicon-on-insulator":[127],"CMOS":[128],"process.":[129],"Measurement":[130],"results":[131],"from":[132],"nine":[133],"cores":[135],"show":[136],"tracks":[140],"timing":[142],"margin":[143],"change":[144],"error":[147],"1.3%":[150],"operating":[154],"over":[156],"range.":[161]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}