{"id":"https://openalex.org/W2076652033","doi":"https://doi.org/10.1109/tvlsi.2014.2352354","title":"McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations","display_name":"McPAT-PVT: Delay and Power Modeling Framework for FinFET Processor Architectures Under PVT Variations","publication_year":2014,"publication_date":"2014-09-15","ids":{"openalex":"https://openalex.org/W2076652033","doi":"https://doi.org/10.1109/tvlsi.2014.2352354","mag":"2076652033"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2014.2352354","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2352354","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084200290","display_name":"Aoxiang Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Aoxiang Tang","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Department of Electrical Engineering, Princeton University  Princeton NJ USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University  Princeton NJ USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100397657","display_name":"Yang Yang","orcid":"https://orcid.org/0000-0002-7022-8938"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yang Yang","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Department of Electrical Engineering, Princeton University  Princeton NJ USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University  Princeton NJ USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028600832","display_name":"Chun\u2010Yi Lee","orcid":"https://orcid.org/0000-0002-4680-4800"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chun-Yi Lee","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Department of Electrical Engineering, Princeton University  Princeton NJ USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University  Princeton NJ USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086131079","display_name":"Niraj K. Jha","orcid":"https://orcid.org/0000-0002-1539-0369"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Niraj K. Jha","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","Department of Electrical Engineering, Princeton University  Princeton NJ USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University  Princeton NJ USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5084200290"],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":2.7213,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.9130517,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"23","issue":"9","first_page":"1616","last_page":"1627"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5934693813323975},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5246886610984802},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5168383717536926},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5036584734916687},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4214743971824646},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.41690492630004883},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41689053177833557},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3614770174026489},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3479844629764557},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3426939845085144}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5934693813323975},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5246886610984802},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5168383717536926},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5036584734916687},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4214743971824646},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.41690492630004883},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41689053177833557},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3614770174026489},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3479844629764557},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3426939845085144},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2014.2352354","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2352354","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6100000143051147}],"awards":[{"id":"https://openalex.org/G1612880521","display_name":null,"funder_award_id":"2010-HJ-2079","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G7825867288","display_name":null,"funder_award_id":"2011-HJ-2167","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":69,"referenced_works":["https://openalex.org/W1497430048","https://openalex.org/W1505816907","https://openalex.org/W1537715695","https://openalex.org/W2000419842","https://openalex.org/W2004676554","https://openalex.org/W2006265664","https://openalex.org/W2011754954","https://openalex.org/W2032094184","https://openalex.org/W2035130574","https://openalex.org/W2050704933","https://openalex.org/W2052022045","https://openalex.org/W2070862897","https://openalex.org/W2073368686","https://openalex.org/W2077505860","https://openalex.org/W2077737229","https://openalex.org/W2080832382","https://openalex.org/W2090982195","https://openalex.org/W2093855145","https://openalex.org/W2097193789","https://openalex.org/W2098286658","https://openalex.org/W2102727118","https://openalex.org/W2105874609","https://openalex.org/W2106759508","https://openalex.org/W2110329567","https://openalex.org/W2113671003","https://openalex.org/W2115819560","https://openalex.org/W2118015263","https://openalex.org/W2119381318","https://openalex.org/W2120116751","https://openalex.org/W2121304948","https://openalex.org/W2125830979","https://openalex.org/W2126564504","https://openalex.org/W2131484760","https://openalex.org/W2132441656","https://openalex.org/W2136328167","https://openalex.org/W2137668897","https://openalex.org/W2138748044","https://openalex.org/W2138768308","https://openalex.org/W2144293278","https://openalex.org/W2146765961","https://openalex.org/W2147657366","https://openalex.org/W2148292324","https://openalex.org/W2150073849","https://openalex.org/W2150368362","https://openalex.org/W2151543599","https://openalex.org/W2151664712","https://openalex.org/W2154857344","https://openalex.org/W2156811502","https://openalex.org/W2161914245","https://openalex.org/W2162935501","https://openalex.org/W2164264749","https://openalex.org/W2165740397","https://openalex.org/W2169875292","https://openalex.org/W2170382128","https://openalex.org/W2548117522","https://openalex.org/W3140903683","https://openalex.org/W3141799332","https://openalex.org/W4237955880","https://openalex.org/W4246056887","https://openalex.org/W4247546971","https://openalex.org/W4253647583","https://openalex.org/W4254506919","https://openalex.org/W6629596415","https://openalex.org/W6630190462","https://openalex.org/W6673265472","https://openalex.org/W6680540102","https://openalex.org/W6681683281","https://openalex.org/W6684189706","https://openalex.org/W6792941224"],"related_works":["https://openalex.org/W1989891105","https://openalex.org/W2103773526","https://openalex.org/W2901469270","https://openalex.org/W2161299897","https://openalex.org/W3173836265","https://openalex.org/W2066671769","https://openalex.org/W2953198199","https://openalex.org/W2027806590","https://openalex.org/W4289106041","https://openalex.org/W2119901732"],"abstract_inverted_index":{"As":[0],"technology":[1],"has":[2,12,282],"moved":[3],"into":[4],"the":[5,8,90,134,277,294,300],"deep-submicrometer":[6],"regime,":[7],"shrinking":[9],"feature":[10],"size":[11],"placed":[13],"a":[14,123,149,188,220,236],"considerable":[15],"stress":[16],"on":[17,173,266],"CMOS":[18,58],"fabrication":[19],"due":[20,59],"to":[21,35,46,60,80,96,111,159,234,253,293],"short-channel":[22],"effects":[23],"(SCEs)":[24],"and":[25,66,74,86,100,116,127,156,198,210,225,238,262,287],"excessive":[26],"leakage.":[27,117],"Although":[28],"many":[29],"research":[30],"efforts":[31],"have":[32,51],"been":[33],"devoted":[34],"seeking":[36],"system-level":[37],"solutions,":[38],"underlying":[39],"transistor-level":[40],"solutions":[41],"are":[42],"still":[43,71],"urgently":[44],"required":[45],"overcome":[47],"these":[48,217],"obstacles.":[49],"FinFETs":[50,70],"emerged":[52],"as":[53,139,141,163,165],"promising":[54],"substitutes":[55],"for":[56,133,196,200,258,270,299],"conventional":[57],"their":[61,166],"superior":[62],"control":[63],"of":[64,136,144,154,241],"SCEs":[65],"process":[67],"scalability.":[68],"However,":[69],"face":[72],"lithographic":[73],"workfunction":[75],"engineering":[76],"challenges,":[77],"in":[78,104,108,114,187],"addition":[79],"those":[81],"posed":[82],"by":[83],"supply":[84,98],"voltage":[85],"temperature":[87,101],"variations":[88,103,143],"across":[89],"integrated":[91,131],"circuit":[92],"(IC).":[93],"These":[94],"lead":[95,110],"process,":[97],"voltage,":[99],"(PVT)":[102],"FinFET":[105,150],"ICs,":[106],"which,":[107],"turn,":[109],"large":[112],"spreads":[113],"delay":[115,237],"In":[118],"this":[119],"paper,":[120],"we":[121],"present":[122,249],"multicore":[124,263],"power,":[125,137],"area,":[126],"timing":[128,197],"(McPAT)-PVT,":[129],"an":[130,226,259],"framework":[132],"simulation":[135,251],"delay,":[138],"well":[140,164],"PVT":[142,167,191,246],"FinFET-based":[145,214,221,279,296],"processors.":[146,215],"McPAT-PVT":[147,204,231],"uses":[148],"design":[151],"library,":[152],"consisting":[153],"logic":[155],"memory":[157],"cells,":[158],"model":[160,206,224],"circuit-level":[161],"characteristics":[162],"variation":[168],"trends.":[169],"It":[170],"is":[171,232],"based":[172,265],"macromodels,":[174],"derived":[175],"from":[176],"very":[177],"accurate":[178],"TCAD":[179],"device":[180],"simulations":[181,264],"that":[182,276],"characterize":[183],"various":[184],"functional":[185],"units":[186],"processor":[189,201,243,261,280,297],"under":[190,245],"variations,":[192],"making":[193],"yield":[194],"analysis":[195],"power":[199,239,286,291],"components":[202,244],"possible.":[203],"can":[205],"both":[207],"shorted-gate":[208,212],"(SG)":[209],"asymmetric-workfunction":[211],"(ASG)":[213],"Combining":[216],"macromodels":[218],"with":[219,303],"CACTI-PVT":[222],"cache":[223],"ORION-PVT":[227],"on-chip":[228],"network":[229],"model,":[230],"able":[233],"simulate":[235],"consumption":[240],"all":[242],"variations.":[247],"We":[248],"extensive":[250],"results":[252],"demonstrate":[254],"its":[255],"efficacy,":[256],"including":[257],"alpha-like":[260],"Princeton":[267],"Application":[268],"Repository":[269],"Shared-Memory":[271],"Computers":[272],"benchmarks.":[273],"Results":[274],"show":[275],"ASG":[278],"implementation":[281,298],"73\u00d7":[283],"lower":[284,289],"leakage":[285],"2.6\u00d7":[288],"total":[290],"relative":[292],"SG":[295],"same":[301],"performance,":[302],"<;1%":[304],"area":[305],"penalty.":[306]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
