{"id":"https://openalex.org/W2061116156","doi":"https://doi.org/10.1109/tvlsi.2014.2339848","title":"Optimization of Overdrive Signoff in High-Performance and Low-Power ICs","display_name":"Optimization of Overdrive Signoff in High-Performance and Low-Power ICs","publication_year":2014,"publication_date":"2014-08-15","ids":{"openalex":"https://openalex.org/W2061116156","doi":"https://doi.org/10.1109/tvlsi.2014.2339848","mag":"2061116156"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2014.2339848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2339848","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113828714","display_name":"Tuck-Boon Chan","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tuck-Boon Chan","raw_affiliation_strings":["University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073558386","display_name":"Andrew B. Kahng","orcid":"https://orcid.org/0000-0002-4490-5018"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew B. Kahng","raw_affiliation_strings":["University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100454287","display_name":"Jiajia Li","orcid":"https://orcid.org/0000-0002-3420-9764"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiajia Li","raw_affiliation_strings":["University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004753161","display_name":"R. Nath","orcid":"https://orcid.org/0000-0003-0207-9261"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Siddhartha Nath","raw_affiliation_strings":["University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043876460","display_name":"Bong-Il Park","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Bongil Park","raw_affiliation_strings":["System LSI Division, Samsung Electronics Company, Ltd., Hwaseong, Korea"],"affiliations":[{"raw_affiliation_string":"System LSI Division, Samsung Electronics Company, Ltd., Hwaseong, Korea","institution_ids":["https://openalex.org/I2250650973"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5113828714"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":0.2093,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.59699378,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"23","issue":"8","first_page":"1552","last_page":"1556"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6444084644317627},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5519570112228394},{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.5418553948402405},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5330083966255188},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4803217947483063},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4424270987510681},{"id":"https://openalex.org/keywords/decoupling","display_name":"Decoupling (probability)","score":0.4359707236289978},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.43542295694351196},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.41680940985679626},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4167201519012451},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3954198360443115},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2819855213165283},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24442517757415771},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.12530604004859924}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6444084644317627},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5519570112228394},{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.5418553948402405},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5330083966255188},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4803217947483063},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4424270987510681},{"id":"https://openalex.org/C205606062","wikidata":"https://www.wikidata.org/wiki/Q5249645","display_name":"Decoupling (probability)","level":2,"score":0.4359707236289978},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.43542295694351196},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.41680940985679626},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4167201519012451},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3954198360443115},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2819855213165283},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24442517757415771},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.12530604004859924},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2014.2339848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2339848","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1509343475","https://openalex.org/W1996623312","https://openalex.org/W2009453719","https://openalex.org/W2024283281","https://openalex.org/W2071693325","https://openalex.org/W2076847609","https://openalex.org/W2101491935","https://openalex.org/W2144658863","https://openalex.org/W2144933802","https://openalex.org/W4233541874","https://openalex.org/W6656175740","https://openalex.org/W6669844795"],"related_works":["https://openalex.org/W2152950565","https://openalex.org/W1617565119","https://openalex.org/W160381218","https://openalex.org/W2512958550","https://openalex.org/W2329266651","https://openalex.org/W3103825105","https://openalex.org/W2004102934","https://openalex.org/W4366455350","https://openalex.org/W2800543810","https://openalex.org/W2082756771"],"abstract_inverted_index":{"In":[0,48],"modern":[1],"system-on-chip":[2],"implementations,":[3],"multimode":[4,45],"design":[5,106],"is":[6,30,115],"commonly":[7],"used":[8],"to":[9,103],"achieve":[10],"better":[11],"circuit":[12,46,60],"performance":[13],"and":[14,19,63,143,151],"power":[15,81,144,167],"across":[16],"voltage-scaled,":[17],"\u201cturbo\u201d":[18],"other":[20],"operating":[21],"modes.":[22,173],"To":[23],"the":[24,38,87,105,148,155,170],"best":[25],"of":[26,40,55,69,89,121],"our":[27,127,160],"knowledge,":[28],"there":[29],"no":[31],"available":[32],"systematic":[33],"analysis":[34],"or":[35,82],"methodology":[36,102,114,129],"for":[37,44,72,108,135],"selection":[39,58],"associated":[41],"signoff":[42,56,70,109,156,172],"modes":[43,157],"implementations.":[47],"this":[49],"brief,":[50],"we":[51,95],"observe":[52],"significant":[53],"impacts":[54],"mode":[57,90,110],"on":[59],"area,":[61],"power,":[62],"performance.":[64],"For":[65],"example,":[66],"incorrect":[67],"choice":[68],"voltages":[71],"required":[73],"overdrive":[74],"frequencies":[75],"can":[76],"incur":[77],"12%":[78],"suboptimality":[79],"in":[80,84,118,133,163,166],"20%":[83],"area.":[85],"Using":[86],"concept":[88],"dominance":[91],"as":[92],"a":[93,97],"guideline,":[94],"propose":[96],"scalable,":[98],"model-based":[99],"adaptive":[100],"search":[101],"explore":[104],"space":[107],"selection.":[111],"Our":[112],"proposed":[113,128],"duty":[116],"cycle-aware":[117],"its":[119],"minimization":[120],"lifetime":[122],"energy.":[123],"Results":[124],"show":[125],"that":[126],"provides":[130],">8%":[131],"improvement":[132],"performance,":[134],"given":[136],"V":[137],"<sub":[138],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[139],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">dd</sub>":[140],",":[141],"area":[142],"constraints,":[145],"compared":[146,168],"with":[147,169],"traditional":[149],"\u201csignoff":[150],"scale\u201d":[152],"method.":[153],"Further,":[154],"determined":[158],"by":[159],"methods":[161],"result":[162],"<;6%":[164],"overhead":[165],"optimal":[171]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}