{"id":"https://openalex.org/W2092101442","doi":"https://doi.org/10.1109/tvlsi.2014.2336851","title":"An Efficient SRAM Yield Analysis and Optimization Method With Adaptive Online Surrogate Modeling","display_name":"An Efficient SRAM Yield Analysis and Optimization Method With Adaptive Online Surrogate Modeling","publication_year":2014,"publication_date":"2014-07-29","ids":{"openalex":"https://openalex.org/W2092101442","doi":"https://doi.org/10.1109/tvlsi.2014.2336851","mag":"2092101442"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2014.2336851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2336851","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080600205","display_name":"Jian Yao","orcid":"https://orcid.org/0000-0003-2622-0215"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Yao","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China","[Inst. of Microelectronics, Tsinghua University, Beijing, China]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"[Inst. of Microelectronics, Tsinghua University, Beijing, China]","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112436964","display_name":"Zuochang Ye","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zuochang Ye","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China","[Inst. of Microelectronics, Tsinghua University, Beijing, China]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"[Inst. of Microelectronics, Tsinghua University, Beijing, China]","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100617593","display_name":"Yan Wang","orcid":"https://orcid.org/0000-0003-4851-6113"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yan Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China","[Inst. of Microelectronics, Tsinghua University, Beijing, China]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"[Inst. of Microelectronics, Tsinghua University, Beijing, China]","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8705,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.77991863,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"23","issue":"7","first_page":"1245","last_page":"1253"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7363967299461365},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.6414059400558472},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6356790661811829},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5530970096588135},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5456486344337463},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5189052224159241},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4730619192123413},{"id":"https://openalex.org/keywords/importance-sampling","display_name":"Importance sampling","score":0.45417356491088867},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4381401836872101},{"id":"https://openalex.org/keywords/plot","display_name":"Plot (graphics)","score":0.41644665598869324},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.372936874628067},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27419930696487427},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.15310469269752502},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1371120810508728},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.11368849873542786}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7363967299461365},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.6414059400558472},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6356790661811829},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5530970096588135},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5456486344337463},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5189052224159241},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4730619192123413},{"id":"https://openalex.org/C52740198","wikidata":"https://www.wikidata.org/wiki/Q1539564","display_name":"Importance sampling","level":3,"score":0.45417356491088867},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4381401836872101},{"id":"https://openalex.org/C167651023","wikidata":"https://www.wikidata.org/wiki/Q1474611","display_name":"Plot (graphics)","level":2,"score":0.41644665598869324},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.372936874628067},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27419930696487427},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.15310469269752502},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1371120810508728},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.11368849873542786},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2014.2336851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2014.2336851","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1572398867","display_name":null,"funder_award_id":"61106031","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5819999192","display_name":null,"funder_award_id":"61176034","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W147475332","https://openalex.org/W631573795","https://openalex.org/W659475733","https://openalex.org/W1569991298","https://openalex.org/W1879678483","https://openalex.org/W1973057345","https://openalex.org/W1989728241","https://openalex.org/W1996241861","https://openalex.org/W2033246483","https://openalex.org/W2043419861","https://openalex.org/W2057920591","https://openalex.org/W2073849139","https://openalex.org/W2076884803","https://openalex.org/W2080315717","https://openalex.org/W2095646370","https://openalex.org/W2095953597","https://openalex.org/W2103793078","https://openalex.org/W2120353978","https://openalex.org/W2123085386","https://openalex.org/W2126639080","https://openalex.org/W2138021254","https://openalex.org/W2155583994","https://openalex.org/W2162613878","https://openalex.org/W2169189905","https://openalex.org/W2504819522","https://openalex.org/W2766039569","https://openalex.org/W3139804307","https://openalex.org/W3151457670","https://openalex.org/W4213121121","https://openalex.org/W4256012597","https://openalex.org/W4297970750","https://openalex.org/W4300580367"],"related_works":["https://openalex.org/W2119312496","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W2107909712","https://openalex.org/W2153162275","https://openalex.org/W2079259690","https://openalex.org/W2108986771","https://openalex.org/W789543267","https://openalex.org/W2004965314","https://openalex.org/W2094295436"],"abstract_inverted_index":{"SRAM":[0,57,145,166],"cells":[1,167],"usually":[2],"require":[3],"extremely":[4,10],"low":[5],"failure":[6,47],"rate":[7,48],"or":[8],"equivalently":[9],"high":[11],"production":[12],"yield,":[13],"making":[14],"it":[15],"impractical":[16],"to":[17,63,71,141],"perform":[18],"yield":[19,58,89,130,135,163],"analysis":[20,59,90,131],"using":[21],"Monte":[22],"Carlo":[23],"(MC)":[24],"method":[25,60,76,91,137],"as":[26,44],"huge":[27],"amount":[28],"of":[29],"samples":[30],"are":[31,40],"needed.":[32],"Fast":[33],"MC":[34],"methods,":[35,39],"e.g.,":[36],"importance":[37,74],"sampling":[38,75],"still":[41],"too":[42],"expensive":[43],"the":[45,87,116,128,144],"anticipated":[46],"is":[49,61,70,120],"very":[50,121],"low.":[51],"In":[52],"this":[53,65],"paper,":[54],"a":[55,160,173],"new":[56],"proposed":[62,88,117,129],"tackle":[64],"issue.":[66],"The":[67],"key":[68],"idea":[69],"improve":[72],"traditional":[73],"with":[77],"an":[78,133],"efficient":[79,134],"online":[80],"surrogate":[81],"model.":[82],"Experimental":[83,156],"results":[84,157],"show":[85,158],"that":[86,159],"achieves":[92],"$5\\times":[93],"$":[94,96],"-$22\\times":[95],"speedup":[97],"over":[98],"existing":[99],"state-of-the-art":[100],"techniques":[101],"without":[102],"sacrificing":[103],"estimation":[104],"accuracy.":[105],"Sigma":[106],"distribution":[107],"and":[108],"schmoo":[109],"plot":[110],"can":[111,152,168],"be":[112,153,169],"quickly":[113],"generated":[114],"by":[115],"method,":[118,132],"which":[119],"useful":[122],"for":[123,165],"realistic":[124],"applications.":[125],"Based":[126],"on":[127],"optimization":[136,164],"has":[138],"been":[139],"developed":[140],"further":[142],"automate":[143],"cell":[146],"design":[147],"procedure":[148],"where":[149],"process":[150],"variations":[151],"fully":[154,161],"considered.":[155],"automatic":[162],"done":[170],"within":[171],"only":[172],"few":[174],"hours.":[175]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
