{"id":"https://openalex.org/W1968133083","doi":"https://doi.org/10.1109/tvlsi.2013.2282742","title":"Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors","display_name":"Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors","publication_year":2013,"publication_date":"2013-10-18","ids":{"openalex":"https://openalex.org/W1968133083","doi":"https://doi.org/10.1109/tvlsi.2013.2282742","mag":"1968133083"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2013.2282742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2282742","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113828714","display_name":"Tuck-Boon Chan","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tuck-Boon Chan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA","Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA#TAB#","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084229134","display_name":"Puneet Gupta","orcid":"https://orcid.org/0000-0002-6188-1134"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Puneet Gupta","raw_affiliation_strings":["Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA","Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA#TAB#","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073558386","display_name":"Andrew B. Kahng","orcid":"https://orcid.org/0000-0002-4490-5018"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew B. Kahng","raw_affiliation_strings":["Department of Computer Science and Engineering and Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering and Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103115149","display_name":"Liangzhen Lai","orcid":"https://orcid.org/0000-0001-6421-5164"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Liangzhen Lai","raw_affiliation_strings":["Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA","Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Electrical Engineering Department, University of California at Los Angeles, Los Angeles, CA, USA#TAB#","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5113828714"],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":1.6551,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.84756527,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"22","issue":"10","first_page":"2117","last_page":"2130"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.8940057754516602},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.65855473279953},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5517119765281677},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5505141615867615},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5148231387138367},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5098609328269958},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.45558059215545654},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4515511095523834},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4292261004447937},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.42324477434158325},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29957544803619385},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.22069653868675232},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18458181619644165},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1700688898563385},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1326000988483429},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.09991547465324402}],"concepts":[{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.8940057754516602},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.65855473279953},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5517119765281677},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5505141615867615},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5148231387138367},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5098609328269958},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.45558059215545654},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4515511095523834},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4292261004447937},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.42324477434158325},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29957544803619385},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.22069653868675232},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18458181619644165},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1700688898563385},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1326000988483429},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.09991547465324402},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2013.2282742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2282742","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1535623014","https://openalex.org/W1552177954","https://openalex.org/W1966741973","https://openalex.org/W1988246668","https://openalex.org/W2013936189","https://openalex.org/W2020656014","https://openalex.org/W2048719801","https://openalex.org/W2060473790","https://openalex.org/W2061747074","https://openalex.org/W2063559373","https://openalex.org/W2065430789","https://openalex.org/W2073459066","https://openalex.org/W2095269804","https://openalex.org/W2095322221","https://openalex.org/W2097718610","https://openalex.org/W2130861008","https://openalex.org/W2146750110","https://openalex.org/W2154221003","https://openalex.org/W2155636448","https://openalex.org/W2162484339","https://openalex.org/W2162709529","https://openalex.org/W2216201525","https://openalex.org/W2268605313","https://openalex.org/W2274826939","https://openalex.org/W2286785546","https://openalex.org/W2403434217","https://openalex.org/W4231450833","https://openalex.org/W4233391220","https://openalex.org/W4235221304","https://openalex.org/W4285719527","https://openalex.org/W6668990524"],"related_works":["https://openalex.org/W2104300577","https://openalex.org/W4206445530","https://openalex.org/W2771786520","https://openalex.org/W39373273","https://openalex.org/W2810180604","https://openalex.org/W2154221003","https://openalex.org/W2129926741","https://openalex.org/W2115150721","https://openalex.org/W2099761217","https://openalex.org/W2099273140"],"abstract_inverted_index":{"With":[0],"CMOS":[1],"technology":[2],"scaling,":[3],"circuit":[4,24,33,49],"performance":[5,25,50],"has":[6],"become":[7],"more":[8],"sensitive":[9],"to":[10,20,38,55,131,134,168],"manufacturing":[11,27],"and":[12,28,77,92],"environmental":[13],"variations.":[14],"Hence,":[15],"there":[16],"is":[17],"a":[18,56,61,136,151],"need":[19],"measure":[21],"or":[22],"monitor":[23],"during":[26],"at":[29],"runtime.":[30],"Since":[31],"each":[32],"may":[34],"have":[35,43],"different":[36],"sensitivities":[37],"process":[39,154],"variations,":[40],"previous":[41],"works":[42],"focused":[44],"on":[45],"the":[46,65,74,102,160],"synthesis":[47,66],"of":[48,67],"monitors":[51],"that":[52,117,156],"are":[53],"specific":[54],"given":[57],"design.":[58],"We":[59],"develop":[60],"systematic":[62],"approach":[63,82],"for":[64,144],"multiple":[68,123],"design-dependent":[69,84],"monitors,":[70],"as":[71,73],"well":[72],"corresponding":[75],"calibration":[76],"delay":[78,98,112,119,162],"estimation":[79,99,120,163],"methods.":[80],"Our":[81,97],"synthesizes":[83],"ring":[85,170],"oscillators":[86],"(DDROs)":[87],"using":[88,122,135],"standard-cell":[89],"library":[90],"gates":[91],"conventional":[93],"physical":[94],"implementation":[95],"flows.":[96],"method":[100,121],"limits":[101],"memory":[103],"usage":[104],"overhead":[105],"by":[106,129,165],"clustering":[107],"critical":[108],"paths":[109],"with":[110],"similar":[111],"sensitivities.":[113],"Experimental":[114],"results":[115,143],"show":[116,155],"our":[118,140],"DDROs":[124],"reduces":[125],"overestimation":[126],"(timing":[127],"margin)":[128],"up":[130],"25%":[132],"compared":[133,167],"single":[137],"monitor.":[138],"Furthermore,":[139],"silicon":[141],"measurement":[142],"monitoring":[145],"an":[146],"industrial":[147],"microprocessor":[148],"implemented":[149],"in":[150],"45-nm":[152],"silicon-on-insulator":[153],"DDRO":[157],"can":[158],"reduce":[159],"mean":[161],"error":[164],"35%":[166],"inverter-based":[169],"oscillators.":[171]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}