{"id":"https://openalex.org/W1991856150","doi":"https://doi.org/10.1109/tvlsi.2013.2280295","title":"Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators","display_name":"Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators","publication_year":2013,"publication_date":"2013-09-18","ids":{"openalex":"https://openalex.org/W1991856150","doi":"https://doi.org/10.1109/tvlsi.2013.2280295","mag":"1991856150"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2013.2280295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2280295","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023905268","display_name":"Davide Rossi","orcid":"https://orcid.org/0000-0002-0651-5393"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Rossi","raw_affiliation_strings":["Advanced Research Center on Electronic Systems for Information and Communication Technologies, University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Research Center on Electronic Systems for Information and Communication Technologies, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045668159","display_name":"Claudio Mucci","orcid":"https://orcid.org/0000-0002-4660-207X"},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Claudio Mucci","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics - Agrate Brianza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics - Agrate Brianza, Italy","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045788417","display_name":"Matteo Pizzotti","orcid":"https://orcid.org/0000-0003-4487-8184"},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Matteo Pizzotti","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics - Agrate Brianza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics - Agrate Brianza, Italy","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109974823","display_name":"L. Perugini","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Luca Perugini","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics - Agrate Brianza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics - Agrate Brianza, Italy","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044201884","display_name":"R. Canegallo","orcid":"https://orcid.org/0000-0002-3381-0697"},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Roberto Canegallo","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics - Agrate Brianza, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics - Agrate Brianza, Italy","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103420211","display_name":"Roberto Guerrieri","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Roberto Guerrieri","raw_affiliation_strings":["Advanced Research Center on Electronic Systems for Information and Communication Technologies, University of Bologna, Bologna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Research Center on Electronic Systems for Information and Communication Technologies, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2687,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.79314502,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"22","issue":"9","first_page":"1990","last_page":"2003"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8198437690734863},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6134023070335388},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5721343159675598},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5397686958312988},{"id":"https://openalex.org/keywords/personalization","display_name":"Personalization","score":0.49054235219955444},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4869857728481293},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.4815290570259094},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.46027159690856934},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4396108388900757},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.43833598494529724},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4208132028579712},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3872677683830261},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.35249951481819153},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.1932068169116974}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8198437690734863},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6134023070335388},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5721343159675598},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5397686958312988},{"id":"https://openalex.org/C183003079","wikidata":"https://www.wikidata.org/wiki/Q1000371","display_name":"Personalization","level":2,"score":0.49054235219955444},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4869857728481293},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.4815290570259094},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.46027159690856934},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4396108388900757},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.43833598494529724},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4208132028579712},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3872677683830261},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.35249951481819153},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.1932068169116974},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2013.2280295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2280295","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:cris.unibo.it:11585/371319","is_oa":false,"landing_page_url":"http://hdl.handle.net/11585/371319","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W68686056","https://openalex.org/W1964471912","https://openalex.org/W1987937699","https://openalex.org/W1988888548","https://openalex.org/W2003526442","https://openalex.org/W2017503457","https://openalex.org/W2024162789","https://openalex.org/W2025849754","https://openalex.org/W2028115839","https://openalex.org/W2035113414","https://openalex.org/W2065627247","https://openalex.org/W2087441910","https://openalex.org/W2101442766","https://openalex.org/W2111413831","https://openalex.org/W2115547150","https://openalex.org/W2115966161","https://openalex.org/W2120080222","https://openalex.org/W2122608448","https://openalex.org/W2133554697","https://openalex.org/W2138506346","https://openalex.org/W2140240784","https://openalex.org/W2141184219","https://openalex.org/W2141516641","https://openalex.org/W2144246699","https://openalex.org/W2149375345","https://openalex.org/W2151415616","https://openalex.org/W2154135709","https://openalex.org/W2162901327","https://openalex.org/W2296760900","https://openalex.org/W2539352587","https://openalex.org/W2540405531","https://openalex.org/W2540500304","https://openalex.org/W3009205062","https://openalex.org/W3144068561","https://openalex.org/W3189823449","https://openalex.org/W4254662547","https://openalex.org/W6654834059"],"related_works":["https://openalex.org/W2140882033","https://openalex.org/W1604320855","https://openalex.org/W2060022998","https://openalex.org/W4308084229","https://openalex.org/W3147787617","https://openalex.org/W1751323127","https://openalex.org/W4295855328","https://openalex.org/W2337452330","https://openalex.org/W2548153218","https://openalex.org/W2017506008"],"abstract_inverted_index":{"The":[0,57,112,168],"computing":[1],"demand":[2],"of":[3,12,16,67,74,91,105,109,130,146,154,177,183,194,208,211],"many":[4,221],"signal":[5,131,185],"processing":[6,132,186,228],"algorithms":[7],"is":[8,51,115,149,170],"dramatically":[9],"growing":[10],"because":[11],"the":[13,25,36,65,106,110,123,126,136,147,152,204,238],"increasing":[14],"complexity":[15],"embedded":[17],"software":[18],"applications.":[19],"Concurrently,":[20],"as":[21,225],"process":[22],"technology":[23],"scales,":[24],"design":[26,119],"effort":[27],"for":[28,237],"realizing":[29],"very":[30],"large":[31],"scale":[32],"integrated":[33,94],"circuits":[34],"and":[35,99,102,157,188],"associated":[37],"costs":[38],"are":[39],"becoming":[40],"critically":[41],"high.":[42],"A":[43,142],"possible":[44],"solution":[45],"to":[46,64,150,172,215,220,231],"address":[47],"this":[48,61],"performance/costs":[49],"challenge":[50],"given":[52],"by":[53],"customizable":[54],"multiprocessor":[55,216],"system-on-chips.":[56],"approach":[58],"proposed":[59,113],"in":[60,125,197,206],"paper":[62],"leads":[63],"customization":[66,77,104,213],"multi/many":[68],"processor":[69],"system-on-chip":[70],"at":[71],"two":[72],"levels":[73],"abstraction:":[75],"1)":[76],"through":[78],"application-specific":[79,93],"hardware":[80,161,212],"accelerators":[81,162],"implemented":[82],"on":[83,180,233],"configurable":[84],"datapath":[85],"that":[86,121],"can":[87],"target":[88],"three":[89],"kinds":[90],"structured":[92],"circuit":[95],"technologies:":[96],"metal,":[97],"via,":[98],"runtime":[100],"programmable":[101],"2)":[103],"architectural":[107],"parameters":[108],"platform.":[111],"platform":[114,169],"equipped":[116],"with":[117,218],"a":[118,165,181],"framework":[120],"assists":[122],"user":[124],"high-level":[127],"design-space":[128],"exploration":[129],"applications":[133,239],"described":[134,163],"using":[135,164],"Open":[137],"Computing":[138],"Language":[139],"(OpenCL)":[140],"language.":[141,167],"peculiar":[143],"added":[144],"value":[145],"flow":[148],"support":[151],"migration":[153],"OpenCL":[155],"kernels":[156],"tasks":[158],"into":[159],"pipelined":[160],"C-level":[166],"able":[171,230],"provide":[173,232],"an":[174,189],"average":[175,190,234],"performance":[176],"90":[178],"GOPS":[179],"set":[182],"reference":[184],"applications,":[187],"computational":[191],"energy":[192,209],"efficiency":[193,210],"130":[195],"GOPS/W":[196,236],"its":[198],"metal-programmable":[199],"configuration.":[200],"This":[201],"result":[202],"shows":[203],"benefits":[205],"terms":[207],"applied":[214],"systems":[217],"respect":[219],"core":[222],"devices":[223],"such":[224],"general-purpose":[226],"graphic":[227],"units,":[229],"2.5":[235],"under":[240],"analysis.":[241]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}
