{"id":"https://openalex.org/W2088998846","doi":"https://doi.org/10.1109/tvlsi.2013.2278334","title":"Reasoning and Learning-Based Dynamic Codec Reconfiguration for Varying Processing Requirements in Network-on-Chip","display_name":"Reasoning and Learning-Based Dynamic Codec Reconfiguration for Varying Processing Requirements in Network-on-Chip","publication_year":2013,"publication_date":"2013-08-28","ids":{"openalex":"https://openalex.org/W2088998846","doi":"https://doi.org/10.1109/tvlsi.2013.2278334","mag":"2088998846"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2013.2278334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2278334","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010678673","display_name":"Jih-Sheng Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Jih-Sheng Shen","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-yi County, Taiwan","Department of Computer Science and Information Engineering National Chung Cheng University Chia\u2010yi County Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-yi County, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering National Chung Cheng University Chia\u2010yi County Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050423310","display_name":"Pao\u2010Ann Hsiung","orcid":"https://orcid.org/0000-0002-3639-1467"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Pao-Ann Hsiung","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-yi County, Taiwan","Department of Computer Science and Information Engineering National Chung Cheng University Chia\u2010yi County Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-yi County, Taiwan","institution_ids":["https://openalex.org/I148099254"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering National Chung Cheng University Chia\u2010yi County Taiwan","institution_ids":["https://openalex.org/I148099254"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010678673"],"corresponding_institution_ids":["https://openalex.org/I148099254"],"apc_list":null,"apc_paid":null,"fwci":1.0873,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.81159743,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"22","issue":"8","first_page":"1777","last_page":"1790"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8318926095962524},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7187289595603943},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6770389676094055},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.6658098101615906},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5995684862136841},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5022861957550049},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.4933103621006012},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4648657441139221},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.43992239236831665},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.428463876247406},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30688905715942383},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.214921772480011}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8318926095962524},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7187289595603943},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6770389676094055},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.6658098101615906},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5995684862136841},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5022861957550049},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.4933103621006012},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4648657441139221},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.43992239236831665},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.428463876247406},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30688905715942383},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.214921772480011},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2013.2278334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2278334","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":46,"referenced_works":["https://openalex.org/W1528600269","https://openalex.org/W1770767549","https://openalex.org/W1817567816","https://openalex.org/W1963845997","https://openalex.org/W1975010174","https://openalex.org/W2014053014","https://openalex.org/W2018804200","https://openalex.org/W2047876330","https://openalex.org/W2061311980","https://openalex.org/W2095211124","https://openalex.org/W2096969376","https://openalex.org/W2097190067","https://openalex.org/W2098572701","https://openalex.org/W2100820851","https://openalex.org/W2104102901","https://openalex.org/W2113937949","https://openalex.org/W2116375887","https://openalex.org/W2127919083","https://openalex.org/W2129233954","https://openalex.org/W2137208570","https://openalex.org/W2137229108","https://openalex.org/W2141834189","https://openalex.org/W2143289758","https://openalex.org/W2147724983","https://openalex.org/W2147894920","https://openalex.org/W2150701106","https://openalex.org/W2162338696","https://openalex.org/W2163912875","https://openalex.org/W2168645257","https://openalex.org/W2171385931","https://openalex.org/W2544053953","https://openalex.org/W3150367143","https://openalex.org/W4237274006","https://openalex.org/W4241933331","https://openalex.org/W4247160936","https://openalex.org/W4247998816","https://openalex.org/W4254700377","https://openalex.org/W4255365631","https://openalex.org/W6631657223","https://openalex.org/W6638105148","https://openalex.org/W6641349882","https://openalex.org/W6662199698","https://openalex.org/W6677230726","https://openalex.org/W6677341229","https://openalex.org/W6681161385","https://openalex.org/W6681874840"],"related_works":["https://openalex.org/W2058520863","https://openalex.org/W1519183141","https://openalex.org/W3151101169","https://openalex.org/W4252744808","https://openalex.org/W2142315955","https://openalex.org/W1659609664","https://openalex.org/W1991497933","https://openalex.org/W2133533999","https://openalex.org/W2356973545","https://openalex.org/W1483813241"],"abstract_inverted_index":{"Crosstalk":[0],"interferences":[1,30,165],"and":[2,31,45,47,53,68,73,94,150,166],"high":[3,32],"dynamic":[4,33,54,90,167],"power":[5,91,168],"consumption":[6],"in":[7,41,50],"a":[8,71,80,111,115,138,157],"network-on-chip":[9],"(NoC)":[10],"are":[11],"two":[12],"increasingly":[13],"problematic":[14],"design":[15],"issues.":[16],"Using":[17],"data":[18,36,106],"codecs":[19,37],"can":[20],"reduce":[21],"the":[22,59,86,100,145,153,161],"switching":[23],"activities":[24],"on":[25,123],"wires":[26],"that":[27,143],"cause":[28],"crosstalk":[29,52,164],"power.":[34,55],"However,":[35],"have":[38],"different":[39],"overheads":[40,147],"terms":[42],"of":[43,62,113,134,148,163],"area":[44],"performance,":[46,93],"varying":[48],"capabilities":[49],"reducing":[51],"To":[56],"adapt":[57],"to":[58,98],"wide":[60],"range":[61],"processing":[63],"requirements":[64],"incurred":[65],"by":[66],"applications":[67],"operating":[69],"environments,":[70],"reasoning":[72],"learning":[74],"(REAL)":[75],"framework":[76],"is":[77],"proposed":[78],"for":[79],"reconfigurable":[81,101,119,154],"NoC.":[82,140],"REAL":[83],"dynamically":[84],"investigates":[85],"tradeoffs":[87],"among":[88],"reliability,":[89],"reduction,":[92],"hardware":[95,151],"resource":[96],"usages":[97],"configure":[99],"NoC":[102,120,155],"with":[103,137],"an":[104],"appropriate":[105],"codec":[107],"at":[108,144],"runtime.":[109],"As":[110],"proof":[112],"concept,":[114],"3":[116,118],"\u00d7":[117],"was":[121],"implemented":[122],"Xilinx":[124],"Virtex-4":[125],"field-programmable":[126],"gate":[127],"array,":[128],"which":[129],"required":[130],"8.2%":[131],"lesser":[132],"number":[133],"slices":[135],"compared":[136],"conventional":[139],"Experiments":[141],"show":[142],"same":[146],"performance":[149],"resources":[152],"induces":[156],"higher":[158],"probability":[159],"toward":[160],"reduction":[162],"consumption.":[169]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}