{"id":"https://openalex.org/W2117057378","doi":"https://doi.org/10.1109/tvlsi.2013.2275571","title":"Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding","display_name":"Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding","publication_year":2013,"publication_date":"2013-08-28","ids":{"openalex":"https://openalex.org/W2117057378","doi":"https://doi.org/10.1109/tvlsi.2013.2275571","mag":"2117057378"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2013.2275571","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2275571","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042036635","display_name":"Chao-Tsung Huang","orcid":"https://orcid.org/0000-0002-9173-520X"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chao-Tsung Huang","raw_affiliation_strings":["Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","Department of Electrical Engineering, National Tsing Hua University Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Tsing Hua University Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076575494","display_name":"Mehul Tikekar","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mehul Tikekar","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","Dept. of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Dept. of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084128470","display_name":"Anantha P. Chandrakasan","orcid":"https://orcid.org/0000-0002-5977-2748"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anantha P. Chandrakasan","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","Dept. of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Dept. of Electrical Engineering & Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.0504,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.93806619,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"22","issue":"7","first_page":"1515","last_page":"1525"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7224897146224976},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6388484239578247},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6248979568481445},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5256765484809875},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.49829936027526855},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47356995940208435},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.43598923087120056},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42074787616729736},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40319687128067017},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38040173053741455},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.32642197608947754},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22015541791915894},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.13842788338661194},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1075020432472229},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09199070930480957}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7224897146224976},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6388484239578247},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6248979568481445},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5256765484809875},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.49829936027526855},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47356995940208435},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.43598923087120056},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42074787616729736},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40319687128067017},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38040173053741455},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.32642197608947754},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22015541791915894},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.13842788338661194},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1075020432472229},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09199070930480957},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2013.2275571","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2275571","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320307801","display_name":"Texas Instruments","ror":"https://ror.org/03vsmv677"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1539909284","https://openalex.org/W2039760575","https://openalex.org/W2043292349","https://openalex.org/W2063660172","https://openalex.org/W2083197892","https://openalex.org/W2107132774","https://openalex.org/W2123383144","https://openalex.org/W2127217676","https://openalex.org/W2145814574","https://openalex.org/W2146395539","https://openalex.org/W2154033560","https://openalex.org/W2168994160","https://openalex.org/W2550255356","https://openalex.org/W3149477716","https://openalex.org/W6632242719","https://openalex.org/W6678647409","https://openalex.org/W6685267501","https://openalex.org/W6729946748"],"related_works":["https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W4293253840","https://openalex.org/W4378977321","https://openalex.org/W1976168335","https://openalex.org/W4308090481","https://openalex.org/W2026052914","https://openalex.org/W2149373426"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,31,62],"high-throughput":[4],"and":[5,52,81,94,100,141,166,179],"areaefficient":[6],"VLSI":[7],"architecture":[8,161],"for":[9,66,98],"intra":[10],"prediction":[11,68],"in":[12,39,59,186],"the":[13,27,87,91,101,159,180,187],"emerging":[14],"high":[15],"efficiency":[16],"video":[17,202],"coding":[18],"standard.":[19],"Three":[20],"design":[21],"techniques":[22,114],"are":[23,132],"proposed":[24,160],"to":[25,135],"address":[26],"complexity":[28],"systematically:":[29],"1)":[30],"hierarchical":[32],"memory":[33],"deployment":[34],"that":[35],"stores":[36],"neighboring":[37],"samples":[38,58],"4.9":[40,167],"Kb":[41,168],"of":[42,47,50,104,126,138,143,169],"static":[43],"RAM":[44],"(SRAM)":[45],"instead":[46],"43.2-k":[48],"gates":[49,165],"registers":[51],"increases":[53],"throughput":[54,76],"by":[55,119],"processing":[56],"reference":[57,105],"registers;":[60],"2)":[61],"mode-adaptive":[63],"scheduling":[64],"scheme":[65],"all":[67],"units,":[69],"which":[70,108,146],"provides":[71],"at":[72,153,204],"least":[73],"2":[74],"samples/cycle":[75,85],"while":[77],"using":[78],"low-throughput":[79],"SRAM":[80,139],"can":[82,109,115,193],"achieve":[83],"2.46":[84],"on":[86,90],"average":[88],"based":[89],"experimental":[92],"results;":[93],"3)":[95],"resource":[96],"sharing":[97],"multipliers":[99],"readout":[102],"circuits":[103,131],"sample":[106],"registers,":[107],"save":[110],"2.5-k":[111],"gates.":[112,150],"These":[113],"efficiently":[116],"reduce":[117,136],"area":[118,175],"40%":[120],"but":[121],"induce":[122],"more":[123],"power":[124,140,181],"because":[125],"additional":[127],"signal":[128],"transitions.":[129],"Signal-gating":[130],"then":[133],"applied":[134],"69%":[137],"32%":[142],"logic":[144],"power,":[145],"cost":[147],"only":[148,163],"1.0-k":[149],"When":[151],"synthesized":[152],"200":[154],"MHz":[155],"with":[156],"40-nm":[157],"process,":[158],"needs":[162],"27.0-k":[164],"single-port":[170],"SRAM.":[171],"The":[172,190],"layout":[173],"core":[174],"is":[176,183],"0.036":[177],"mm2,":[178],"consumption":[182],"2.11":[184],"mW":[185],"postlayout":[188],"simulation.":[189],"corresponding":[191],"performance":[192],"support":[194],"quad":[195],"full":[196],"high-definition":[197],"(HD)":[198],"(3840":[199],"\u00d7":[200],"2160)":[201],"decoding":[203],"30":[205],"frames/s.":[206]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":6},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}