{"id":"https://openalex.org/W2077015174","doi":"https://doi.org/10.1109/tvlsi.2013.2265937","title":"Processor Tile Shapes and Interconnect Topologies for Dense On-Chip Networks","display_name":"Processor Tile Shapes and Interconnect Topologies for Dense On-Chip Networks","publication_year":2013,"publication_date":"2013-06-25","ids":{"openalex":"https://openalex.org/W2077015174","doi":"https://doi.org/10.1109/tvlsi.2013.2265937","mag":"2077015174"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2013.2265937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2265937","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031439988","display_name":"Zhibin Xiao","orcid":"https://orcid.org/0000-0002-9028-5884"},"institutions":[{"id":"https://openalex.org/I1342911587","display_name":"Oracle (United States)","ror":"https://ror.org/006c77m33","country_code":"US","type":"company","lineage":["https://openalex.org/I1342911587"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhibin Xiao","raw_affiliation_strings":["Oracle America Inc., Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Oracle America Inc., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1342911587"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058921665","display_name":"Bevan Baas","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bevan M. Baas","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.15894673,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"22","issue":"6","first_page":"1377","last_page":"1390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9901999831199646,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/tile","display_name":"Tile","score":0.912205696105957},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7164992094039917},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6859486103057861},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6664450168609619},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.46786025166511536},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.4432191252708435},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4328964650630951},{"id":"https://openalex.org/keywords/network-processor","display_name":"Network processor","score":0.4183977544307709},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.415389746427536},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41269126534461975},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3523739278316498},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18085399270057678},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1743277609348297},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14701306819915771},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.135277658700943},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13463839888572693},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09391835331916809},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.07684740424156189}],"concepts":[{"id":"https://openalex.org/C2780728851","wikidata":"https://www.wikidata.org/wiki/Q468402","display_name":"Tile","level":2,"score":0.912205696105957},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7164992094039917},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6859486103057861},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6664450168609619},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46786025166511536},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.4432191252708435},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4328964650630951},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.4183977544307709},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.415389746427536},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41269126534461975},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3523739278316498},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18085399270057678},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1743277609348297},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14701306819915771},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.135277658700943},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13463839888572693},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09391835331916809},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.07684740424156189},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2013.2265937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2265937","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7400000095367432}],"awards":[],"funders":[{"id":"https://openalex.org/F4320307102","display_name":"Intel Corporation","ror":"https://ror.org/01ek73717"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1541688521","https://openalex.org/W1968024299","https://openalex.org/W2005345974","https://openalex.org/W2006500015","https://openalex.org/W2017503457","https://openalex.org/W2096783892","https://openalex.org/W2097569130","https://openalex.org/W2098544339","https://openalex.org/W2098920024","https://openalex.org/W2104691761","https://openalex.org/W2107440355","https://openalex.org/W2111700531","https://openalex.org/W2112292992","https://openalex.org/W2115611348","https://openalex.org/W2120056261","https://openalex.org/W2125357468","https://openalex.org/W2127173779","https://openalex.org/W2127945400","https://openalex.org/W2128735978","https://openalex.org/W2130181701","https://openalex.org/W2147830095","https://openalex.org/W2165967421","https://openalex.org/W2169067358","https://openalex.org/W2171825402","https://openalex.org/W4245623567","https://openalex.org/W6651790823","https://openalex.org/W6654834059","https://openalex.org/W6676863834","https://openalex.org/W6678665702","https://openalex.org/W6679224135"],"related_works":["https://openalex.org/W2114959296","https://openalex.org/W38346124","https://openalex.org/W2502442966","https://openalex.org/W2138666621","https://openalex.org/W2383936314","https://openalex.org/W2777914781","https://openalex.org/W1992771654","https://openalex.org/W4246369972","https://openalex.org/W4244869112","https://openalex.org/W2581250438"],"abstract_inverted_index":{"We":[0],"propose":[1],"two":[2,4],"eight-neighbor,":[3],"five-nearest-neighbor,":[5],"and":[6,28,39,52,60,65,69,81,85,97,147],"three":[7],"six-nearest-neighbor":[8],"interconnection":[9],"topologies":[10,59],"for":[11],"many-core":[12],"processor":[13,21,34,45,67],"arrays-three":[14],"of":[15,50,71,145,153],"which":[16],"use":[17],"five-sided":[18,66],"or":[19],"hexagonal":[20,64,116],"tiles-which":[22],"typically":[23],"reduce":[24],"application":[25,33,142,150],"communication":[26],"distance":[27],"result":[29],"in":[30,57],"an":[31,139,148],"overall":[32],"that":[35],"requires":[36],"fewer":[37],"cores":[38],"lower":[40],"power":[41,151],"consumption.":[42],"A":[43,91],"16-bit":[44],"with":[46,76,126],"the":[47,127],"appropriate":[48],"number":[49],"input":[51],"output":[53],"ports":[54],"is":[55],"implemented":[56],"all":[58,112],"tile":[61,117,124],"shapes.":[62],"The":[63,114],"tiles":[68,72],"arrays":[70],"are":[73,109],"laid":[74],"out":[75],"industry":[77],"standard":[78],"automatic":[79],"place":[80],"route":[82],"design":[83],"flow":[84],"Manhattan-style":[86],"wires":[87],"without":[88],"full-custom":[89],"layout.":[90],"1080p":[92],"H.264/AVC":[93],"residual":[94],"video":[95],"encoder":[96],"a":[98,119],"54":[99],"Mb/s":[100],"802.11a/g":[101],"OFDM":[102],"wireless":[103],"local":[104],"area":[105,121,143],"network":[106],"baseband":[107],"receiver":[108],"mapped":[110],"onto":[111],"topologies.":[113],"six-neighbor":[115],"incurs":[118],"2.9%":[120],"increase":[122],"per":[123],"compared":[125],"four-neighbor":[128],"2-D":[129],"mesh,":[130],"but":[131],"its":[132],"much":[133],"more":[134],"effective":[135],"interprocessor":[136],"interconnect":[137],"yields":[138],"average":[140,149],"total":[141],"reduction":[144],"22%":[146],"savings":[152],"17%.":[154]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}