{"id":"https://openalex.org/W1965539595","doi":"https://doi.org/10.1109/tvlsi.2012.2231888","title":"Efficiency Optimization of a Step-Down Switched Capacitor Converter for Subthreshold","display_name":"Efficiency Optimization of a Step-Down Switched Capacitor Converter for Subthreshold","publication_year":2013,"publication_date":"2013-01-29","ids":{"openalex":"https://openalex.org/W1965539595","doi":"https://doi.org/10.1109/tvlsi.2012.2231888","mag":"1965539595"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2012.2231888","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2231888","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003914546","display_name":"Natan Krihely","orcid":null},"institutions":[{"id":"https://openalex.org/I124227911","display_name":"Ben-Gurion University of the Negev","ror":"https://ror.org/05tkyf982","country_code":"IL","type":"education","lineage":["https://openalex.org/I124227911"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Natan Krihely","raw_affiliation_strings":["Power Electronics Laboratory, Department of Electrical and Computer Engineering, Ben-Gurion University of the Negev, Beersheba, Israel","Dept. of Electr. & Comput. Eng., Ben-Gurion Univ of the Negev, Beer Sheva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Power Electronics Laboratory, Department of Electrical and Computer Engineering, Ben-Gurion University of the Negev, Beersheba, Israel","institution_ids":["https://openalex.org/I124227911"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Ben-Gurion Univ of the Negev, Beer Sheva, Israel","institution_ids":["https://openalex.org/I124227911"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047175410","display_name":"S. Ben\u2010Yaakov","orcid":"https://orcid.org/0000-0003-1308-543X"},"institutions":[{"id":"https://openalex.org/I124227911","display_name":"Ben-Gurion University of the Negev","ror":"https://ror.org/05tkyf982","country_code":"IL","type":"education","lineage":["https://openalex.org/I124227911"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Sam Ben-Yaakov","raw_affiliation_strings":["Power Electronics Laboratory, Department of Electrical and Computer Engineering, Ben-Gurion University of the Negev, Beersheba, Israel","Dept. of Electr. & Comput. Eng., Ben-Gurion Univ of the Negev, Beer Sheva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Power Electronics Laboratory, Department of Electrical and Computer Engineering, Ben-Gurion University of the Negev, Beersheba, Israel","institution_ids":["https://openalex.org/I124227911"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Ben-Gurion Univ of the Negev, Beer Sheva, Israel","institution_ids":["https://openalex.org/I124227911"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065902823","display_name":"Alexander Fish","orcid":"https://orcid.org/0000-0002-4994-1536"},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Alexander Fish","raw_affiliation_strings":["Bar-Ilan University, Ramat Gan, IL","Fac. of Eng., Bar Ilan Univ., Ramat Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bar-Ilan University, Ramat Gan, IL","institution_ids":[]},{"raw_affiliation_string":"Fac. of Eng., Bar Ilan Univ., Ramat Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0041,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.7506174,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"21","issue":"12","first_page":"2353","last_page":"2357"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/switched-capacitor","display_name":"Switched capacitor","score":0.8291010856628418},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.7261738777160645},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.6149613857269287},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5865316390991211},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5525054931640625},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5170412659645081},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.516783595085144},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4852909445762634},{"id":"https://openalex.org/keywords/battery","display_name":"Battery (electricity)","score":0.47787895798683167},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4774254262447357},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.45641711354255676},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.42734864354133606},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3985067903995514},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3140770494937897},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14657709002494812},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.07342427968978882}],"concepts":[{"id":"https://openalex.org/C103357873","wikidata":"https://www.wikidata.org/wiki/Q572656","display_name":"Switched capacitor","level":4,"score":0.8291010856628418},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.7261738777160645},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.6149613857269287},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5865316390991211},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5525054931640625},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5170412659645081},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.516783595085144},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4852909445762634},{"id":"https://openalex.org/C555008776","wikidata":"https://www.wikidata.org/wiki/Q267298","display_name":"Battery (electricity)","level":3,"score":0.47787895798683167},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4774254262447357},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.45641711354255676},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42734864354133606},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3985067903995514},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3140770494937897},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14657709002494812},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.07342427968978882},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2012.2231888","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2231888","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W68467325","https://openalex.org/W1809341016","https://openalex.org/W2014686645","https://openalex.org/W2018964792","https://openalex.org/W2037603715","https://openalex.org/W2097324958","https://openalex.org/W2138019299","https://openalex.org/W2142004333","https://openalex.org/W2160397464","https://openalex.org/W2161380844"],"related_works":["https://openalex.org/W2155827627","https://openalex.org/W4242937255","https://openalex.org/W2131019417","https://openalex.org/W2018127069","https://openalex.org/W2132385758","https://openalex.org/W2766813066","https://openalex.org/W1593424929","https://openalex.org/W4312378593","https://openalex.org/W2139413555","https://openalex.org/W2124313625"],"abstract_inverted_index":{"In":[0],"this":[1],"brief,":[2],"an":[3],"efficient":[4],"voltage":[5],"scalable":[6],"switched":[7],"capacitor":[8],"converter":[9,44,60],"(SCC)":[10],"for":[11,102],"1.1":[12],"V":[13],"battery-powered":[14],"digital":[15],"system":[16],"is":[17,61,106],"presented.":[18],"The":[19,42,59],"SCC":[20,79,105],"employs":[21],"a":[22,64,96],"binary":[23],"resolution":[24],"technique":[25],"to":[26,34,51,93,108,116],"preserve":[27,117],"high":[28],"efficiency":[29,40,76,118],"at":[30],"load":[31,121],"voltages":[32],"down":[33],"sub-200":[35],"mV":[36,90],"while":[37],"keeping":[38],"the":[39,75,78,86,110,113],"high.":[41],"proposed":[43],"can":[45,80],"be":[46,81],"configured":[47],"into":[48],"four":[49],"topologies":[50],"support":[52],"subthreshold":[53],"output":[54],"levels":[55],"of":[56,77,88,112],"0.18-0.6":[57],"V.":[58],"designed":[62],"in":[63,85],"standard":[65],"lowpower":[66],"40-nm":[67],"CMOS":[68],"TSMC":[69],"process.":[70],"Simulation":[71],"results":[72],"show":[73],"that":[74],"improved":[82],"by":[83],"10%-11%":[84],"vicinity":[87],"VDD=200":[89],"as":[91],"compared":[92],"one":[94],"using":[95],"conventional":[97],"approach.":[98],"An":[99],"optimization":[100],"strategy":[101],"designing":[103],"multi-topology":[104],"presented":[107],"improve":[109],"effectiveness":[111],"circuit":[114],"and":[115],"over":[119],"large":[120],"voltages.":[122]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
