{"id":"https://openalex.org/W2021075864","doi":"https://doi.org/10.1109/tvlsi.2012.2220791","title":"Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs","display_name":"Exploiting Replicated Cache Blocks to Reduce L2 Cache Leakage in CMPs","publication_year":2012,"publication_date":"2012-11-21","ids":{"openalex":"https://openalex.org/W2021075864","doi":"https://doi.org/10.1109/tvlsi.2012.2220791","mag":"2021075864"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2012.2220791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2220791","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101595694","display_name":"Hyunhee Kim","orcid":"https://orcid.org/0000-0003-3353-1628"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Hyunhee Kim","raw_affiliation_strings":["Samsung Electronics Company Limited, Suwon, South Korea"],"affiliations":[{"raw_affiliation_string":"Samsung Electronics Company Limited, Suwon, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078262826","display_name":"Jung Ho Ahn","orcid":"https://orcid.org/0000-0003-1733-1394"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jung Ho Ahn","raw_affiliation_strings":["Graduate School of Convergence Science and Technology, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Graduate School of Convergence Science and Technology, Seoul National University, Seoul, South Korea","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062560097","display_name":"Jihong Kim","orcid":"https://orcid.org/0000-0002-7977-9883"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jihong Kim","raw_affiliation_strings":["Department of Computer Science and Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Seoul National University, Seoul, South Korea","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101595694"],"corresponding_institution_ids":["https://openalex.org/I2250650973"],"apc_list":null,"apc_paid":null,"fwci":0.8702,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.72765599,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"21","issue":"10","first_page":"1863","last_page":"1877"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8371992707252502},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.8350766897201538},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7946963310241699},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.6777227520942688},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.6317704916000366},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6284606456756592},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6029384136199951},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.5828233361244202},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.5176990032196045},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4957643449306488},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4850141704082489},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43730881810188293},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.4291457235813141},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.4233912229537964},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4199608564376831}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8371992707252502},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.8350766897201538},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7946963310241699},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.6777227520942688},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.6317704916000366},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6284606456756592},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6029384136199951},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.5828233361244202},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.5176990032196045},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4957643449306488},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4850141704082489},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43730881810188293},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.4291457235813141},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.4233912229537964},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4199608564376831},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2012.2220791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2220791","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9200000166893005,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":49,"referenced_works":["https://openalex.org/W1530841921","https://openalex.org/W1850405760","https://openalex.org/W2013129990","https://openalex.org/W2037531986","https://openalex.org/W2041653803","https://openalex.org/W2045110768","https://openalex.org/W2050487400","https://openalex.org/W2066691060","https://openalex.org/W2075190356","https://openalex.org/W2082147382","https://openalex.org/W2103269931","https://openalex.org/W2110999128","https://openalex.org/W2113676942","https://openalex.org/W2118383989","https://openalex.org/W2118543332","https://openalex.org/W2119867930","https://openalex.org/W2120393760","https://openalex.org/W2125769457","https://openalex.org/W2126357937","https://openalex.org/W2128757673","https://openalex.org/W2131054871","https://openalex.org/W2133765762","https://openalex.org/W2134131177","https://openalex.org/W2142702271","https://openalex.org/W2145021036","https://openalex.org/W2160010046","https://openalex.org/W2160602621","https://openalex.org/W2161364792","https://openalex.org/W2164738015","https://openalex.org/W2170382128","https://openalex.org/W2171164959","https://openalex.org/W2243416539","https://openalex.org/W2725179571","https://openalex.org/W2911669905","https://openalex.org/W3140488055","https://openalex.org/W3148339845","https://openalex.org/W3148387930","https://openalex.org/W4235106764","https://openalex.org/W4238549726","https://openalex.org/W4243739118","https://openalex.org/W4248310916","https://openalex.org/W4253202538","https://openalex.org/W4253891859","https://openalex.org/W6631699381","https://openalex.org/W6653713536","https://openalex.org/W6679644487","https://openalex.org/W6680028775","https://openalex.org/W6690457156","https://openalex.org/W6792816510"],"related_works":["https://openalex.org/W4312759433","https://openalex.org/W2290179447","https://openalex.org/W1994369542","https://openalex.org/W273173017","https://openalex.org/W1521238853","https://openalex.org/W2123859627","https://openalex.org/W2046654858","https://openalex.org/W1689154679","https://openalex.org/W2043512019","https://openalex.org/W1573461927"],"abstract_inverted_index":{"Modern":[0],"chip":[1],"multiprocessors":[2],"(CMPs)":[3],"employ":[4],"large":[5],"L2":[6,24,46,61,103,227,240],"caches":[7,104,216,228,241],"to":[8,36,77,123,159],"reduce":[9],"the":[10,20,37,42,69,79,115,124,130,143,167,174,179,193,209,231,235,239,243,257],"performance":[11,254],"gap":[12],"between":[13],"processors":[14,156],"and":[15,139,242],"off-chip":[16],"memory.":[17],"However,":[18],"as":[19],"size":[21],"of":[22,45,68,117,181,238],"an":[23,50,118],"cache":[25,74,120,132,138,148,161,259],"increases,":[26],"its":[27,72],"leakage":[28,43,93,106,260],"power":[29,39,44,107],"consumption":[30,237],"also":[31],"becomes":[32],"a":[33,66,91,197,222],"major":[34],"contributor":[35],"total":[38],"dissipation.":[40],"Managing":[41],"caches,":[47,62],"therefore,":[48],"is":[49,83,127,152,212],"important":[51],"issue":[52],"in":[53,71,75,101,135,157],"realizing":[54],"low-power":[55],"CMPs.":[56],"In":[57,86],"CMPs":[58],"with":[59,196,225,250],"private":[60,102,226],"each":[63],"processor":[64],"makes":[65],"copy":[67],"data":[70,80],"local":[73],"order":[76,158],"access":[78],"faster,":[81],"which":[82],"called":[84],"replication.":[85],"this":[87],"paper,":[88],"we":[89],"propose":[90],"novel":[92],"management":[94,261],"technique":[95,176,186,233],"that":[96,208,230],"dynamically":[97,177],"turns":[98],"off":[99,142,166],"replications":[100,170],"for":[105],"reduction":[108],"by":[109,154,190,214,246],"exploiting":[110],"two":[111],"key":[112],"observations:":[113],"1)":[114],"cost":[116],"extra":[119,147],"miss":[121,149],"due":[122],"turned-off":[125,182,199],"replication":[126,144],"small":[128],"because":[129],"same":[131],"block":[133,211],"exists":[134],"another":[136],"on-chip":[137],"2)":[140],"turning":[141,165],"incurs":[145],"no":[146],"if":[150],"it":[151],"invalidated":[153],"other":[155,215],"maintain":[160],"coherence.":[162],"Since":[163],"blindly":[164],"frequently":[168],"accessed":[169],"can":[171,187],"degrade":[172],"performance,":[173],"proposed":[175,185,232],"controls":[178],"number":[180],"replications.":[183],"The":[184,204],"be":[188],"implemented":[189],"slightly":[191],"modifying":[192],"MESI":[194],"protocol":[195],"new":[198],"shared":[200,213],"(TOS)":[201],"coherence":[202],"state.":[203],"TOS":[205],"state":[206],"indicates":[207],"corresponding":[210],"but":[217],"turned":[218],"off.":[219],"Experiments":[220],"on":[221,248],"four-processor":[223],"CMP":[224],"show":[229],"reduces":[234],"energy":[236],"main":[244],"memory":[245],"19.4%":[247],"average,":[249],"less":[251],"than":[252],"1%":[253],"loss":[255],"over":[256],"existing":[258],"technique.":[262]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2014,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}