{"id":"https://openalex.org/W2040720842","doi":"https://doi.org/10.1109/tvlsi.2012.2212254","title":"Technique for Efficient Evaluation of SRAM Timing Failure","display_name":"Technique for Efficient Evaluation of SRAM Timing Failure","publication_year":2012,"publication_date":"2012-09-10","ids":{"openalex":"https://openalex.org/W2040720842","doi":"https://doi.org/10.1109/tvlsi.2012.2212254","mag":"2040720842"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2012.2212254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2212254","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029605412","display_name":"Masood Qazi","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Masood Qazi","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076575494","display_name":"Mehul Tikekar","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mehul Tikekar","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075795132","display_name":"Lara Dolecek","orcid":"https://orcid.org/0000-0003-3736-4345"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lara Dolecek","raw_affiliation_strings":["Department of Electrical Engineering, University of California, Los Angeles, CA, USA","Dept. of Electr. Eng., Univ. of California Los Angeles, Los Angeles, CA, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Univ. of California Los Angeles, Los Angeles, CA, , USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029499294","display_name":"Devavrat Shah","orcid":"https://orcid.org/0000-0003-0737-3259"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Devavrat Shah","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084128470","display_name":"Anantha P. Chandrakasan","orcid":"https://orcid.org/0000-0002-5977-2748"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anantha P. Chandrakasan","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5029605412"],"corresponding_institution_ids":["https://openalex.org/I63966007"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.12102303,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"21","issue":"8","first_page":"1558","last_page":"1562"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10928","display_name":"Probabilistic and Robust Engineering Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1804","display_name":"Statistics, Probability and Uncertainty"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T10928","display_name":"Probabilistic and Robust Engineering Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1804","display_name":"Statistics, Probability and Uncertainty"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8910582065582275},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6845563054084778},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.6715706586837769},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5665836930274963},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5279437899589539},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.47884345054626465},{"id":"https://openalex.org/keywords/importance-sampling","display_name":"Importance sampling","score":0.47581154108047485},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.46423712372779846},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.43793219327926636},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3636813163757324},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35130780935287476},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1963385045528412},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.192159503698349},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.1795334815979004},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.14893436431884766},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12728244066238403},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.10725671052932739}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8910582065582275},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6845563054084778},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.6715706586837769},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5665836930274963},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5279437899589539},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.47884345054626465},{"id":"https://openalex.org/C52740198","wikidata":"https://www.wikidata.org/wiki/Q1539564","display_name":"Importance sampling","level":3,"score":0.47581154108047485},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.46423712372779846},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.43793219327926636},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3636813163757324},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35130780935287476},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1963385045528412},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.192159503698349},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.1795334815979004},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.14893436431884766},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12728244066238403},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.10725671052932739},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2012.2212254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2212254","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1997140745","https://openalex.org/W2033246483","https://openalex.org/W2041230794","https://openalex.org/W2053362661","https://openalex.org/W2101628159","https://openalex.org/W2101813923","https://openalex.org/W2103793078","https://openalex.org/W2114810610","https://openalex.org/W2119312496","https://openalex.org/W2120353978","https://openalex.org/W2130282462","https://openalex.org/W2145345888","https://openalex.org/W2154311590","https://openalex.org/W3139804307","https://openalex.org/W3143794633","https://openalex.org/W3151457670","https://openalex.org/W3151880060","https://openalex.org/W4247460323","https://openalex.org/W4247991081","https://openalex.org/W6663640170"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2027972911","https://openalex.org/W2146343568","https://openalex.org/W2742914308","https://openalex.org/W2330004501","https://openalex.org/W2017089693","https://openalex.org/W2703295919"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,17,39,56,59,109],"technique":[4],"to":[5,36,48],"evaluate":[6,51],"the":[7,24,27,31,52,85,99],"timing":[8,28,53],"variation":[9],"of":[10,26,38,42,55],"static":[11],"random":[12],"access":[13],"memory":[14],"(SRAM).":[15],"Specifically,":[16],"method":[18,61],"called":[19],"loop":[20],"flattening,":[21],"which":[22],"reduces":[23],"evaluation":[25],"statistics":[29],"in":[30,93],"complex":[32],"highly":[33],"structured":[34],"circuit":[35],"that":[37],"single":[40,57],"chain":[41],"component":[43],"circuits,":[44],"is":[45,118],"justified.":[46],"Then,":[47],"very":[49],"quickly":[50],"delay":[54],"chain,":[58],"statistical":[60,115],"based":[62,96],"on":[63,97],"importance":[64],"sampling":[65,71],"augmented":[66],"with":[67,90,112],"targeted":[68],"high-dimensional":[69],"spherical":[70],"can":[72],"be":[73],"employed.":[74],"The":[75],"overall":[76],"methodology":[77],"has":[78],"shown":[79],"650\u00d7":[80],"or":[81],"greater":[82],"speedup":[83],"over":[84],"nominal":[86],"Monte":[87],"Carlo":[88],"approach":[89],"10.5%":[91],"accuracy":[92],"probability.":[94],"Examples":[95],"both":[98],"large-signal":[100],"and":[101,108],"small-signal":[102],"SRAM":[103],"read":[104],"path":[105],"are":[106],"discussed,":[107],"detailed":[110],"comparison":[111],"state-of-the-art":[113],"accelerated":[114],"simulation":[116],"techniques":[117],"given.":[119]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
