{"id":"https://openalex.org/W2127656032","doi":"https://doi.org/10.1109/tvlsi.2012.2198678","title":"Subthreshold Dual Mode Logic","display_name":"Subthreshold Dual Mode Logic","publication_year":2012,"publication_date":"2012-06-19","ids":{"openalex":"https://openalex.org/W2127656032","doi":"https://doi.org/10.1109/tvlsi.2012.2198678","mag":"2127656032"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2012.2198678","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2198678","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032205972","display_name":"Asaf Kaizerman","orcid":null},"institutions":[{"id":"https://openalex.org/I4210137024","display_name":"Danish Power Systems (Denmark)","ror":"https://ror.org/03kf4k440","country_code":"DK","type":"company","lineage":["https://openalex.org/I4210137024"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Asaf Kaizerman","raw_affiliation_strings":["Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","institution_ids":["https://openalex.org/I4210137024"]},{"raw_affiliation_string":"VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108507879","display_name":"Sagi Fisher","orcid":null},"institutions":[{"id":"https://openalex.org/I4210137024","display_name":"Danish Power Systems (Denmark)","ror":"https://ror.org/03kf4k440","country_code":"DK","type":"company","lineage":["https://openalex.org/I4210137024"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Sagi Fisher","raw_affiliation_strings":["Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","institution_ids":["https://openalex.org/I4210137024"]},{"raw_affiliation_string":"VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065902823","display_name":"Alexander Fish","orcid":"https://orcid.org/0000-0002-4994-1536"},"institutions":[{"id":"https://openalex.org/I4210137024","display_name":"Danish Power Systems (Denmark)","ror":"https://ror.org/03kf4k440","country_code":"DK","type":"company","lineage":["https://openalex.org/I4210137024"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Alexander Fish","raw_affiliation_strings":["Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Low Power Circuits and Systems Laboratory, VLSI Systems Center, Beersheva, Israel","institution_ids":["https://openalex.org/I4210137024"]},{"raw_affiliation_string":"VLSI Syst. Center, Low Power Circuits & Syst. Lab., Beer-Sheva, Israel","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210137024"],"apc_list":null,"apc_paid":null,"fwci":2.7008,"has_fulltext":false,"cited_by_count":54,"citation_normalized_percentile":{"value":0.90952516,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"21","issue":"5","first_page":"979","last_page":"983"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6444589495658875},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6424780488014221},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5964512825012207},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5751876831054688},{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.5601097941398621},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5526165962219238},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5382112860679626},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5376179814338684},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5302046537399292},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5203789472579956},{"id":"https://openalex.org/keywords/current-mode-logic","display_name":"Current-mode logic","score":0.49217668175697327},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.41820794343948364},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4138838052749634},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3469361960887909},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3262764811515808},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.32343101501464844},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.30202367901802063},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28629082441329956},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.25940385460853577},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1314241588115692}],"concepts":[{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6444589495658875},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6424780488014221},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5964512825012207},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5751876831054688},{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.5601097941398621},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5526165962219238},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5382112860679626},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5376179814338684},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5302046537399292},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5203789472579956},{"id":"https://openalex.org/C2780295579","wikidata":"https://www.wikidata.org/wiki/Q5195108","display_name":"Current-mode logic","level":3,"score":0.49217668175697327},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.41820794343948364},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4138838052749634},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3469361960887909},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3262764811515808},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.32343101501464844},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.30202367901802063},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28629082441329956},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25940385460853577},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1314241588115692},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2012.2198678","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2198678","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7300000190734863,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1607087355","https://openalex.org/W1967171495","https://openalex.org/W1974982221","https://openalex.org/W2002612140","https://openalex.org/W2010635096","https://openalex.org/W2031337889","https://openalex.org/W2087107264","https://openalex.org/W2105143058","https://openalex.org/W2111372718","https://openalex.org/W2113375885","https://openalex.org/W2114070111","https://openalex.org/W2142702094","https://openalex.org/W2170335526","https://openalex.org/W2482923099","https://openalex.org/W3203964238","https://openalex.org/W4230854430","https://openalex.org/W4237030520","https://openalex.org/W4239145761","https://openalex.org/W6658152620","https://openalex.org/W6675791936","https://openalex.org/W6676987389"],"related_works":["https://openalex.org/W2050591234","https://openalex.org/W2171918386","https://openalex.org/W2594780754","https://openalex.org/W2534190481","https://openalex.org/W2991771859","https://openalex.org/W2118487491","https://openalex.org/W4285230816","https://openalex.org/W1601832081","https://openalex.org/W2895902477","https://openalex.org/W1491122910"],"abstract_inverted_index":{"In":[0,38],"this":[1],"brief,":[2],"we":[3],"introduce":[4],"a":[5,68],"novel":[6],"low-power":[7,46],"dual":[8],"mode":[9,54],"logic":[10,22],"(DML)":[11],"family,":[12],"designed":[13],"to":[14,35,90,110],"operate":[15],"in":[16,52,96,108],"the":[17,41,86,97,112],"subthreshold":[18],"region.":[19],"The":[20],"proposed":[21,87,113],"family":[23],"can":[24],"be":[25],"switched":[26],"between":[27],"static":[28,39],"and":[29,70,75,83,93],"dynamic":[30,53],"modes":[31],"of":[32,85,101],"operation":[33],"according":[34],"system":[36],"requirements.":[37],"mode,":[40],"DML":[42,88],"gates":[43,89],"feature":[44],"very":[45],"dissipation":[47],"with":[48,60,67],"moderate":[49],"performance,":[50,58,80],"while":[51],"they":[55],"achieve":[56],"higher":[57],"albeit":[59],"increased":[61],"power":[62,81],"dissipation.":[63],"This":[64],"is":[65],"achieved":[66],"simple":[69],"intuitive":[71],"design":[72],"concept.":[73,114],"SPICE":[74],"Monte":[76],"Carlo":[77],"simulations":[78],"compare":[79],"dissipation,":[82],"robustness":[84],"their":[91],"CMOS":[92],"domino":[94],"counterparts":[95],"80-nm":[98,103],"process.":[99],"Measurements":[100],"an":[102],"test":[104],"chip":[105],"are":[106],"presented":[107],"order":[109],"prove":[111]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":12},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
